Searched refs:REG_A6XX_PDC_GPU_TCS3_CMD_ENABLE_BANK (Results 1 – 2 of 2) sorted by relevance
577 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS3_CMD_ENABLE_BANK, 7); in a6xx_gmu_rpmh_init()
7504 #define REG_A6XX_PDC_GPU_TCS3_CMD_ENABLE_BANK 0x000015d7 macro