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Searched refs:REG_A6XX_TPL1_NC_MODE_CNTL (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/msm/adreno/
Da6xx_gpu.c594 gpu_write(gpu, REG_A6XX_TPL1_NC_MODE_CNTL, lower_bit << 1); in a6xx_set_ubwc_config()
Da6xx.xml.h2397 #define REG_A6XX_TPL1_NC_MODE_CNTL 0x0000b604 macro