Searched refs:SD_VPCLK0_CTL (Results 1 – 8 of 8) sorted by relevance
/drivers/staging/rts5208/ |
D | rtsx_card.c | 672 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, in switch_ssc_clock() 674 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, in switch_ssc_clock() 782 retval = rtsx_write_register(chip, SD_VPCLK0_CTL, in switch_normal_clock() 801 retval = rtsx_write_register(chip, SD_VPCLK0_CTL, in switch_normal_clock()
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D | rtsx_card.h | 787 #define SD_VPCLK0_CTL 0xFC2A macro 791 #define SD_VPTX_CTL SD_VPCLK0_CTL
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D | sd.c | 845 retval = rtsx_write_register(chip, SD_VPCLK0_CTL, 849 retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
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/drivers/misc/cardreader/ |
D | rts5228.c | 682 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5228_pci_switch_clock() 686 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5228_pci_switch_clock()
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D | rts5261.c | 712 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5261_pci_switch_clock() 716 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5261_pci_switch_clock()
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D | rtsx_usb.c | 460 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_usb_switch_clock() 462 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_usb_switch_clock()
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D | rtsx_pcr.c | 787 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock() 789 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
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/drivers/mmc/host/ |
D | rtsx_usb_sdmmc.c | 591 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, in sd_change_phase() 597 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0); in sd_change_phase() 598 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, in sd_change_phase()
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