Home
last modified time | relevance | path

Searched refs:SIZE (Results 1 – 24 of 24) sorted by relevance

/drivers/hid/
Dhid-roccat-common.h47 #define ROCCAT_COMMON2_SYSFS_W(thingy, COMMAND, SIZE) \ argument
53 SIZE, COMMAND); \
56 #define ROCCAT_COMMON2_SYSFS_R(thingy, COMMAND, SIZE) \ argument
62 SIZE, COMMAND); \
65 #define ROCCAT_COMMON2_SYSFS_RW(thingy, COMMAND, SIZE) \ argument
66 ROCCAT_COMMON2_SYSFS_W(thingy, COMMAND, SIZE) \
67 ROCCAT_COMMON2_SYSFS_R(thingy, COMMAND, SIZE)
69 #define ROCCAT_COMMON2_BIN_ATTRIBUTE_RW(thingy, COMMAND, SIZE) \ argument
70 ROCCAT_COMMON2_SYSFS_RW(thingy, COMMAND, SIZE); \
73 .size = SIZE, \
[all …]
/drivers/crypto/qat/qat_common/
Dadf_transport_access_macros.h52 #define ADF_MSG_SIZE_TO_BYTES(SIZE) (SIZE << 5) argument
53 #define ADF_BYTES_TO_MSG_SIZE(SIZE) (SIZE >> 5) argument
54 #define ADF_SIZE_TO_RING_SIZE_IN_BYTES(SIZE) ((1 << (SIZE - 1)) << 7) argument
55 #define ADF_RING_SIZE_IN_BYTES_TO_SIZE(SIZE) ((1 << (SIZE - 1)) >> 7) argument
58 #define ADF_RING_SIZE_BYTES_MIN(SIZE) \ argument
59 ((SIZE < ADF_SIZE_TO_RING_SIZE_IN_BYTES(ADF_RING_SIZE_4K)) ? \
60 ADF_SIZE_TO_RING_SIZE_IN_BYTES(ADF_RING_SIZE_4K) : SIZE)
61 #define ADF_RING_SIZE_MODULO(SIZE) (SIZE + 0x6) argument
62 #define ADF_SIZE_TO_POW(SIZE) ((((SIZE & 0x4) >> 1) | ((SIZE & 0x4) >> 2) | \ argument
63 SIZE) & ~0x4)
/drivers/gpu/drm/amd/amdgpu/
Dnbio_v7_0.c87 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size); in nbio_v7_0_sdma_doorbell_range()
89 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_0_sdma_doorbell_range()
106 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 8); in nbio_v7_0_vcn_doorbell_range()
109 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_0_vcn_doorbell_range()
133 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 2); in nbio_v7_0_ih_doorbell_range()
135 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0); in nbio_v7_0_ih_doorbell_range()
Dnbio_v2_3.c102 BIF_SDMA0_DOORBELL_RANGE, SIZE, in nbio_v2_3_sdma_doorbell_range()
106 BIF_SDMA0_DOORBELL_RANGE, SIZE, in nbio_v2_3_sdma_doorbell_range()
125 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 8); in nbio_v2_3_vcn_doorbell_range()
128 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 0); in nbio_v2_3_vcn_doorbell_range()
174 BIF_IH_DOORBELL_RANGE, SIZE, in nbio_v2_3_ih_doorbell_range()
178 BIF_IH_DOORBELL_RANGE, SIZE, in nbio_v2_3_ih_doorbell_range()
Dnbio_v7_4.c123 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size); in nbio_v7_4_sdma_doorbell_range()
125 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_4_sdma_doorbell_range()
148 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 8); in nbio_v7_4_vcn_doorbell_range()
151 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_4_vcn_doorbell_range()
188 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 4); in nbio_v7_4_ih_doorbell_range()
190 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0); in nbio_v7_4_ih_doorbell_range()
Dnbio_v6_1.c80 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size); in nbio_v6_1_sdma_doorbell_range()
82 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0); in nbio_v6_1_sdma_doorbell_range()
122 BIF_IH_DOORBELL_RANGE, SIZE, 6); in nbio_v6_1_ih_doorbell_range()
124 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0); in nbio_v6_1_ih_doorbell_range()
/drivers/gpu/drm/nouveau/dispnv50/
Dhead827d.c42 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); in head827d_curs_clr()
61 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head827d_curs_set()
Dheadc37d.c135 NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in headc37d_curs_set()
186 NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_LUT, SIZE, asyh->olut.size) | in headc37d_olut_set()
Dhead917d.c91 NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head917d_curs_set()
Dhead507d.c135 NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); in head507d_curs_clr()
152 NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head507d_curs_set()
Dhead907d.c165 NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); in head907d_curs_clr()
184 NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head907d_curs_set()
Dwndwc57e.c137 NVVAL(NVC57E, SET_ILUT_CONTROL, SIZE, asyw->xlut.i.size) | in wndwc57e_ilut_set()
Dheadc57d.c111 NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, SIZE, asyh->olut.size), in headc57d_olut_set()
Dwndwc37e.c78 NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, SIZE, asyw->xlut.i.size), in wndwc37e_ilut_set()
/drivers/net/ethernet/qualcomm/emac/
Demac-mac.c234 #define EMAC_RRD(RXQ, SIZE, IDX) ((RXQ)->rrd.v_addr + (SIZE * (IDX))) argument
235 #define EMAC_RFD(RXQ, SIZE, IDX) ((RXQ)->rfd.v_addr + (SIZE * (IDX))) argument
236 #define EMAC_TPD(TXQ, SIZE, IDX) ((TXQ)->tpd.v_addr + (SIZE * (IDX))) argument
/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
Dvmm.h285 #define VMM_MAP_ITER(VMM,PT,PTEI,PTEN,MAP,FILL,BASE,SIZE,NEXT) do { \ argument
288 u64 _ptes = ((SIZE) - MAP->off) >> MAP->page->shift; \
/drivers/dma/
Dpch_dma.c339 channel_writel(pd_chan, SIZE, desc->regs.size); in pdc_dostart()
754 pd->ch_regs[i].size = channel_readl(pd_chan, SIZE); in pch_dma_save_regs()
777 channel_writel(pd_chan, SIZE, pd->ch_regs[i].size); in pch_dma_restore_regs()
/drivers/media/usb/pwc/
Dpwc.h62 #define PWC_DEBUG_SIZE(fmt, args...) PWC_DEBUG(SIZE, fmt, ##args)
/drivers/media/pci/cobalt/
Dcobalt-omnitek.c49 #define SIZE(c) (BASE + 0x58 + ((c) * 0x40)) macro
/drivers/net/wireless/admtek/
Dadm8211.h437 #define ADM8211_SRAM_SIZE ADM8211_SRAM(SIZE)
/drivers/net/ethernet/amd/xgbe/
Dxgbe-pci.c291 pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE); in xgbe_pci_probe()
/drivers/net/ethernet/huawei/hinic/
Dhinic_hw_api_cmd.c246 HINIC_API_CMD_DESC_SET(SIZE_4BYTES(cmd_size), SIZE); in prepare_api_cmd()
Dhinic_hw_eqs.c251 size = HINIC_EQ_ELEM_DESC_GET(aeqe_desc, SIZE); in aeq_irq_handler()
/drivers/net/ethernet/qlogic/qed/
Dqed_debug.c335 #define FIELD_BIT_SIZE(type, field) type ## _ ## field ## _ ## SIZE