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Searched refs:SOR1_TIMING_CYA (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Ddc.h296 #define SOR1_TIMING_CYA (1 << 27) macro
Dsor.c2228 value &= ~SOR1_TIMING_CYA; in tegra_sor_hdmi_disable()
2625 value |= SOR1_TIMING_CYA; in tegra_sor_hdmi_enable()