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Searched refs:SQ_S_CMP_EQ_U32 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_enum.h3561 #define SQ_S_CMP_EQ_U32 0x6 macro
Dgfx_8_0_enum.h3947 #define SQ_S_CMP_EQ_U32 0x6 macro
Dgfx_8_1_enum.h3967 #define SQ_S_CMP_EQ_U32 0x6 macro
/drivers/gpu/drm/amd/include/
Dvega10_enum.h19340 #define SQ_S_CMP_EQ_U32 0x00000006 macro