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Searched refs:TB_CFG_SWITCH (Results 1 – 10 of 10) sorted by relevance

/drivers/thunderbolt/
Dlc.c20 return tb_sw_read(sw, uuid, TB_CFG_SWITCH, sw->cap_lc + TB_LC_FUSE, 4); in tb_lc_read_uuid()
27 return tb_sw_read(sw, desc, TB_CFG_SWITCH, sw->cap_lc + TB_LC_DESC, 1); in read_lc_desc()
62 ret = tb_sw_read(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1); in tb_lc_set_port_configured()
82 return tb_sw_write(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1); in tb_lc_set_port_configured()
120 ret = tb_sw_read(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1); in tb_lc_set_xdomain_configured()
135 return tb_sw_write(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1); in tb_lc_set_xdomain_configured()
171 ret = tb_sw_read(sw, &ctrl, TB_CFG_SWITCH, in tb_lc_set_wake_one()
186 return tb_sw_write(sw, &ctrl, TB_CFG_SWITCH, offset + TB_LC_SX_CTRL, 1); in tb_lc_set_wake_one()
257 ret = tb_sw_read(sw, &ctrl, TB_CFG_SWITCH, in tb_lc_set_sleep()
263 ret = tb_sw_write(sw, &ctrl, TB_CFG_SWITCH, in tb_lc_set_sleep()
[all …]
Dtmu.c45 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, in tb_switch_tmu_ucap_supported()
58 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, in tb_switch_tmu_rate_read()
72 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, in tb_switch_tmu_rate_write()
80 return tb_sw_write(sw, &val, TB_CFG_SWITCH, in tb_switch_tmu_rate_write()
136 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, in tb_switch_tmu_set_time_disruption()
146 return tb_sw_write(sw, &val, TB_CFG_SWITCH, in tb_switch_tmu_set_time_disruption()
226 ret = tb_sw_read(root_switch, gm_local_time, TB_CFG_SWITCH, in tb_switch_tmu_post_time()
255 ret = tb_sw_write(sw, &local_time, TB_CFG_SWITCH, in tb_switch_tmu_post_time()
268 ret = tb_sw_write(sw, &post_time, TB_CFG_SWITCH, post_time_offset, 2); in tb_switch_tmu_post_time()
274 ret = tb_sw_read(sw, &post_time, TB_CFG_SWITCH, in tb_switch_tmu_post_time()
Dcap.c35 ret = tb_sw_read(sw, &value, TB_CFG_SWITCH, offset, 1); in tb_port_enable_tmu()
44 return tb_sw_write(sw, &value, TB_CFG_SWITCH, offset, 1); in tb_port_enable_tmu()
153 ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, offset, 2); in tb_switch_next_cap()
200 ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, offset, 1); in tb_switch_find_cap()
233 ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, offset, 1); in tb_switch_find_vse_cap()
Dusb4.c64 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1); in usb4_switch_wait_for_bit()
83 return tb_sw_read(sw, data, TB_CFG_SWITCH, ROUTER_CS_9, dwords); in usb4_switch_op_read_data()
92 return tb_sw_write(sw, data, TB_CFG_SWITCH, ROUTER_CS_9, dwords); in usb4_switch_op_write_data()
97 return tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1); in usb4_switch_op_read_metadata()
102 return tb_sw_write(sw, &metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1); in usb4_switch_op_write_metadata()
181 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1); in usb4_switch_op()
189 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1); in usb4_switch_op()
210 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1)) in usb4_switch_check_wakes()
278 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1); in usb4_switch_setup()
293 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1); in usb4_switch_setup()
[all …]
Ddebugfs.c151 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, offset, 1); in regs_write()
268 ret = tb_sw_read(sw, data, TB_CFG_SWITCH, cap + offset, dwords); in cap_show()
434 ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, cap, 1); in switch_cap_show()
442 ret = tb_sw_read(sw, (u32 *)&header + 1, TB_CFG_SWITCH, in switch_cap_show()
490 ret = tb_sw_read(sw, data, TB_CFG_SWITCH, 0, dwords); in switch_basic_regs_show()
Deeprom.c20 return tb_sw_write(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1); in tb_eeprom_ctl_write()
28 return tb_sw_read(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1); in tb_eeprom_ctl_read()
146 res = tb_sw_read(sw, &cap, TB_CFG_SWITCH, sw->cap_plug_events, in tb_eeprom_get_drom_offset()
455 ret = tb_sw_read(sw, &drom_offset, TB_CFG_SWITCH, in tb_drom_copy_nvm()
Dswitch.c1289 TB_CFG_SWITCH, 2, 2); in tb_switch_reset()
1314 res = tb_sw_write(sw, ((u32 *) &sw->config) + 4, TB_CFG_SWITCH, 4, 1); in tb_plug_events_active()
1318 res = tb_sw_read(sw, &data, TB_CFG_SWITCH, sw->cap_plug_events + 1, 1); in tb_plug_events_active()
1335 return tb_sw_write(sw, &data, TB_CFG_SWITCH, in tb_plug_events_active()
1908 ret = tb_cfg_read(tb->ctl, &sw->config, route, 0, TB_CFG_SWITCH, 0, 5); in tb_switch_alloc()
2052 ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH, in tb_switch_configure()
2069 ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH, in tb_switch_configure()
Dtb_msgs.h18 TB_CFG_SWITCH = 2, enumerator
Dicm.c984 return pcie2cio_write(tb_priv(tb), TB_CFG_SWITCH, 0, 0x777, BIT(1)); in icm_tr_cio_reset()
1427 return pcie2cio_write(tb_priv(tb), TB_CFG_SWITCH, 0, 0x50, BIT(9)); in icm_ar_cio_reset()
1725 res = tb_cfg_read_raw(tb->ctl, &tmp, 0, 0, TB_CFG_SWITCH, in __icm_driver_ready()
Dctl.c1033 TB_CFG_SWITCH, 0, 1, in tb_cfg_get_upstream_port()