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Searched refs:TMU_RTR_CS_3_TS_PACKET_INTERVAL_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/thunderbolt/
Dtmu.c77 val &= ~TMU_RTR_CS_3_TS_PACKET_INTERVAL_MASK; in tb_switch_tmu_rate_write()
Dtb_regs.h229 #define TMU_RTR_CS_3_TS_PACKET_INTERVAL_MASK GENMASK(31, 16) macro