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Searched refs:_vcs_dpi_display_dlg_regs_st (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/amd/display/dc/inc/hw/
Dhubp.h93 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
100 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
188 struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr,
Dmem_input.h94 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubp.h124 struct _vcs_dpi_display_dlg_regs_st *dlg_attr);
128 struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
Ddcn21_hubp.c79 struct _vcs_dpi_display_dlg_regs_st *dlg_attr) in apply_DEDCN21_142_wa_for_hostvm_deadline()
129 struct _vcs_dpi_display_dlg_regs_st *dlg_attr, in hubp21_program_deadline()
171 struct _vcs_dpi_display_dlg_regs_st *dlg_attr, in hubp21_setup()
254 struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr, in hubp21_validate_dml_output()
259 struct _vcs_dpi_display_dlg_regs_st dlg_attr = {0}; in hubp21_validate_dml_output()
/drivers/gpu/drm/amd/display/dc/dml/
Ddml1_display_rq_dlg_calc.h56 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
Ddisplay_mode_structs.h50 typedef struct _vcs_dpi_display_dlg_regs_st display_dlg_regs_st;
437 struct _vcs_dpi_display_dlg_regs_st { struct
Ddml1_display_rq_dlg_calc.c999 struct _vcs_dpi_display_dlg_regs_st *disp_dlg_regs, in dml1_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubp.h267 struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
306 struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
Ddcn20_hubp.c81 struct _vcs_dpi_display_dlg_regs_st *dlg_attr, in hubp2_program_deadline()
230 struct _vcs_dpi_display_dlg_regs_st *dlg_attr, in hubp2_setup()
247 struct _vcs_dpi_display_dlg_regs_st *dlg_attr, in hubp2_setup_interdependent()
1074 struct _vcs_dpi_display_dlg_regs_st *dlg_attr = &s->dlg_attr; in hubp2_read_state_common()
1278 struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr, in hubp2_validate_dml_output()
1283 struct _vcs_dpi_display_dlg_regs_st dlg_attr = {0}; in hubp2_validate_dml_output()
Ddcn20_hwseq.c1318 struct _vcs_dpi_display_dlg_regs_st old_dlg_attr = old_pipe->dlg_regs; in dcn20_detect_pipe_changes()
1320 struct _vcs_dpi_display_dlg_regs_st *new_dlg_attr = &new_pipe->dlg_regs; in dcn20_detect_pipe_changes()
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_hubp.c426 struct _vcs_dpi_display_dlg_regs_st *dlg_attr, in hubp3_program_deadline()
466 struct _vcs_dpi_display_dlg_regs_st *dlg_attr, in hubp3_setup()
Ddcn30_hubp.h271 struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hubp.c588 struct _vcs_dpi_display_dlg_regs_st *dlg_attr, in hubp1_program_deadline()
676 struct _vcs_dpi_display_dlg_regs_st *dlg_attr, in hubp1_setup()
691 struct _vcs_dpi_display_dlg_regs_st *dlg_attr, in hubp1_setup_interdependent()
871 struct _vcs_dpi_display_dlg_regs_st *dlg_attr = &s->dlg_attr; in hubp1_read_state_common()
Ddcn10_hubp.h660 struct _vcs_dpi_display_dlg_regs_st dlg_attr;
701 struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
Ddcn10_hw_sequencer_debug.c250 struct _vcs_dpi_display_dlg_regs_st *dlg_regs = &s->dlg_attr; in dcn10_get_dlg_states()
Ddcn10_hw_sequencer.c223 struct _vcs_dpi_display_dlg_regs_st *dlg_regs = &s->dlg_attr; in dcn10_log_hubp_states()
/drivers/gpu/drm/amd/display/dc/inc/
Dcore_types.h327 struct _vcs_dpi_display_dlg_regs_st dlg_regs;
/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c459 struct _vcs_dpi_display_dlg_regs_st *dlg_regs = &pipe->dlg_regs; in dcn_bw_calc_rq_dlg_ttu()