/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_irq.h | 60 struct amdgpu_irq_src { struct 68 struct amdgpu_irq_src **sources; argument 73 int (*set)(struct amdgpu_device *adev, struct amdgpu_irq_src *source, 77 struct amdgpu_irq_src *source, 94 struct amdgpu_irq_src self_irq; 109 struct amdgpu_irq_src *source); 112 int amdgpu_irq_update(struct amdgpu_device *adev, struct amdgpu_irq_src *src, 114 int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src, 116 int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src, 118 bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
|
D | amdgpu_irq.c | 122 struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; in amdgpu_irq_disable_all() 326 struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; in amdgpu_irq_fini() 359 struct amdgpu_irq_src *source) in amdgpu_irq_add_id() 373 sizeof(struct amdgpu_irq_src *), in amdgpu_irq_add_id() 411 struct amdgpu_irq_src *src; in amdgpu_irq_dispatch() 462 struct amdgpu_irq_src *src, unsigned type) in amdgpu_irq_update() 499 struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; in amdgpu_irq_gpu_reset_resume_helper() 521 int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src, in amdgpu_irq_get() 551 int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src, in amdgpu_irq_put() 582 bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src, in amdgpu_irq_enabled()
|
D | amdgpu_sdma.h | 64 struct amdgpu_irq_src trap_irq; 65 struct amdgpu_irq_src illegal_inst_irq; 66 struct amdgpu_irq_src ecc_irq; 125 struct amdgpu_irq_src *source,
|
D | amdgpu_gfx.h | 104 struct amdgpu_irq_src irq; 294 struct amdgpu_irq_src eop_irq; 295 struct amdgpu_irq_src priv_reg_irq; 296 struct amdgpu_irq_src priv_inst_irq; 297 struct amdgpu_irq_src cp_ecc_error_irq; 298 struct amdgpu_irq_src sq_irq; 352 struct amdgpu_irq_src *irq); 391 struct amdgpu_irq_src *source,
|
D | mxgpu_nv.c | 233 struct amdgpu_irq_src *source, in xgpu_nv_mailbox_ack_irq() 241 struct amdgpu_irq_src *source, in xgpu_nv_set_mailbox_ack_irq() 295 struct amdgpu_irq_src *src, in xgpu_nv_set_mailbox_rcv_irq() 312 struct amdgpu_irq_src *source, in xgpu_nv_mailbox_rcv_irq()
|
D | mxgpu_ai.c | 215 struct amdgpu_irq_src *source, in xgpu_ai_mailbox_ack_irq() 223 struct amdgpu_irq_src *source, in xgpu_ai_set_mailbox_ack_irq() 271 struct amdgpu_irq_src *src, in xgpu_ai_set_mailbox_rcv_irq() 285 struct amdgpu_irq_src *source, in xgpu_ai_mailbox_rcv_irq()
|
D | amdgpu_nbio.h | 92 struct amdgpu_irq_src ras_controller_irq; 93 struct amdgpu_irq_src ras_err_event_athub_irq;
|
D | mxgpu_vi.c | 490 struct amdgpu_irq_src *source, in xgpu_vi_mailbox_ack_irq() 498 struct amdgpu_irq_src *src, in xgpu_vi_set_mailbox_ack_irq() 528 struct amdgpu_irq_src *src, in xgpu_vi_set_mailbox_rcv_irq() 542 struct amdgpu_irq_src *source, in xgpu_vi_mailbox_rcv_irq()
|
D | nbio_v7_4.c | 371 struct amdgpu_irq_src *src, in nbio_v7_4_set_ras_controller_irq_state() 395 struct amdgpu_irq_src *source, in nbio_v7_4_process_ras_controller_irq() 407 struct amdgpu_irq_src *src, in nbio_v7_4_set_ras_err_event_athub_irq_state() 431 struct amdgpu_irq_src *source, in nbio_v7_4_process_err_event_athub_irq()
|
D | amdgpu_virt.h | 211 struct amdgpu_irq_src ack_irq; 212 struct amdgpu_irq_src rcv_irq;
|
D | amdgpu_gmc.h | 213 struct amdgpu_irq_src vm_fault; 241 struct amdgpu_irq_src ecc_irq;
|
D | amdgpu_ring.h | 101 struct amdgpu_irq_src *irq_src; 116 struct amdgpu_irq_src *irq_src, 287 unsigned int ring_size, struct amdgpu_irq_src *irq_src,
|
D | amdgpu_jpeg.h | 38 struct amdgpu_irq_src irq;
|
D | amdgpu_umc.h | 75 struct amdgpu_irq_src *source,
|
D | amdgpu_vce.h | 49 struct amdgpu_irq_src irq;
|
D | amdgpu_uvd.h | 47 struct amdgpu_irq_src irq;
|
D | amdgpu.h | 253 struct amdgpu_irq_src; 852 struct amdgpu_irq_src crtc_irq; 853 struct amdgpu_irq_src vupdate_irq; 854 struct amdgpu_irq_src pageflip_irq; 855 struct amdgpu_irq_src hpd_irq;
|
D | jpeg_v3_0.c | 505 struct amdgpu_irq_src *source, in jpeg_v3_0_set_interrupt_state() 513 struct amdgpu_irq_src *source, in jpeg_v3_0_process_interrupt()
|
D | amdgpu_umc.c | 142 struct amdgpu_irq_src *source, in amdgpu_umc_process_ecc_irq()
|
D | vce_v2_0.c | 519 struct amdgpu_irq_src *source, in vce_v2_0_set_interrupt_state() 533 struct amdgpu_irq_src *source, in vce_v2_0_process_interrupt()
|
D | amdgpu_sdma.c | 169 struct amdgpu_irq_src *source, in amdgpu_sdma_process_ecc_irq()
|
D | jpeg_v2_5.c | 506 struct amdgpu_irq_src *source, in jpeg_v2_5_set_interrupt_state() 514 struct amdgpu_irq_src *source, in jpeg_v2_5_process_interrupt()
|
D | gmc_v10_0.c | 60 struct amdgpu_irq_src *src, in gmc_v10_0_ecc_interrupt_state() 69 struct amdgpu_irq_src *src, unsigned type, in gmc_v10_0_vm_fault_interrupt_state() 93 struct amdgpu_irq_src *source, in gmc_v10_0_process_interrupt()
|
/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_irq.c | 594 struct amdgpu_irq_src *source, in amdgpu_dm_irq_handler() 635 struct amdgpu_irq_src *source, in amdgpu_dm_set_hpd_irq_state() 647 struct amdgpu_irq_src *source, in dm_irq_state() 678 struct amdgpu_irq_src *source, in amdgpu_dm_set_pflip_irq_state() 692 struct amdgpu_irq_src *source, in amdgpu_dm_set_crtc_irq_state() 706 struct amdgpu_irq_src *source, in amdgpu_dm_set_vupdate_irq_state()
|
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | smu_helper.c | 592 struct amdgpu_irq_src *source, in phm_irq_process() 646 struct amdgpu_irq_src *source = in smu9_register_irq_handlers() 647 kzalloc(sizeof(struct amdgpu_irq_src), GFP_KERNEL); in smu9_register_irq_handlers()
|