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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3  *
4  * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
5  *
6  ******************************************************************************/
7 #ifndef __RTW_PWRCTRL_H_
8 #define __RTW_PWRCTRL_H_
9 
10 #include <linux/mutex.h>
11 
12 #define FW_PWR0	0
13 #define FW_PWR1		1
14 #define FW_PWR2		2
15 #define FW_PWR3		3
16 
17 
18 #define HW_PWR0	7
19 #define HW_PWR1		6
20 #define HW_PWR2		2
21 #define HW_PWR3	0
22 #define HW_PWR4	8
23 
24 #define FW_PWRMSK	0x7
25 
26 
27 #define XMIT_ALIVE	BIT(0)
28 #define RECV_ALIVE	BIT(1)
29 #define CMD_ALIVE	BIT(2)
30 #define EVT_ALIVE	BIT(3)
31 #define BTCOEX_ALIVE	BIT(4)
32 
33 
34 enum Power_Mgnt {
35 	PS_MODE_ACTIVE	= 0,
36 	PS_MODE_MIN,
37 	PS_MODE_MAX,
38 	PS_MODE_DTIM,	/* PS_MODE_SELF_DEFINED */
39 	PS_MODE_VOIP,
40 	PS_MODE_UAPSD_WMM,
41 	PS_MODE_UAPSD,
42 	PS_MODE_IBSS,
43 	PS_MODE_WWLAN,
44 	PM_Radio_Off,
45 	PM_Card_Disable,
46 	PS_MODE_NUM,
47 };
48 
49 #ifdef CONFIG_PNO_SUPPORT
50 #define MAX_PNO_LIST_COUNT 16
51 #define MAX_SCAN_LIST_COUNT 14 /* 2.4G only */
52 #endif
53 
54 /*
55 	BIT[2:0] = HW state
56 	BIT[3] = Protocol PS state,   0: register active state , 1: register sleep state
57 	BIT[4] = sub-state
58 */
59 
60 #define PS_DPS				BIT(0)
61 #define PS_LCLK				(PS_DPS)
62 #define PS_RF_OFF			BIT(1)
63 #define PS_ALL_ON			BIT(2)
64 #define PS_ST_ACTIVE		BIT(3)
65 
66 #define PS_ISR_ENABLE		BIT(4)
67 #define PS_IMR_ENABLE		BIT(5)
68 #define PS_ACK				BIT(6)
69 #define PS_TOGGLE			BIT(7)
70 
71 #define PS_STATE_MASK		(0x0F)
72 #define PS_STATE_HW_MASK	(0x07)
73 #define PS_SEQ_MASK			(0xc0)
74 
75 #define PS_STATE(x)		(PS_STATE_MASK & (x))
76 #define PS_STATE_HW(x)	(PS_STATE_HW_MASK & (x))
77 #define PS_SEQ(x)		(PS_SEQ_MASK & (x))
78 
79 #define PS_STATE_S0		(PS_DPS)
80 #define PS_STATE_S1		(PS_LCLK)
81 #define PS_STATE_S2		(PS_RF_OFF)
82 #define PS_STATE_S3		(PS_ALL_ON)
83 #define PS_STATE_S4		((PS_ST_ACTIVE) | (PS_ALL_ON))
84 
85 
86 #define PS_IS_RF_ON(x)	((x) & (PS_ALL_ON))
87 #define PS_IS_ACTIVE(x)	((x) & (PS_ST_ACTIVE))
88 #define CLR_PS_STATE(x)	((x) = ((x) & (0xF0)))
89 
90 
91 struct reportpwrstate_parm {
92 	unsigned char mode;
93 	unsigned char state; /* the CPWM value */
94 	unsigned short rsvd;
95 };
96 
97 #define LPS_DELAY_TIME	1*HZ /*  1 sec */
98 
99 #define EXE_PWR_NONE	0x01
100 #define EXE_PWR_IPS		0x02
101 #define EXE_PWR_LPS		0x04
102 
103 /*  RF state. */
104 enum rt_rf_power_state {
105 	rf_on,		/*  RF is on after RFSleep or RFOff */
106 	rf_sleep,	/*  802.11 Power Save mode */
107 	rf_off,		/*  HW/SW Radio OFF or Inactive Power Save */
108 	/* Add the new RF state above this line ===== */
109 	rf_max
110 };
111 
112 /*  RF Off Level for IPS or HW/SW radio off */
113 #define	RT_RF_OFF_LEVL_ASPM			BIT(0)	/*  PCI ASPM */
114 #define	RT_RF_OFF_LEVL_CLK_REQ		BIT(1)	/*  PCI clock request */
115 #define	RT_RF_OFF_LEVL_PCI_D3			BIT(2)	/*  PCI D3 mode */
116 #define	RT_RF_OFF_LEVL_HALT_NIC		BIT(3)	/*  NIC halt, re-initialize hw parameters */
117 #define	RT_RF_OFF_LEVL_FREE_FW		BIT(4)	/*  FW free, re-download the FW */
118 #define	RT_RF_OFF_LEVL_FW_32K		BIT(5)	/*  FW in 32k */
119 #define	RT_RF_PS_LEVEL_ALWAYS_ASPM	BIT(6)	/*  Always enable ASPM and Clock Req in initialization. */
120 #define	RT_RF_LPS_DISALBE_2R			BIT(30)	/*  When LPS is on, disable 2R if no packet is received or transmittd. */
121 #define	RT_RF_LPS_LEVEL_ASPM			BIT(31)	/*  LPS with ASPM */
122 
123 #define	RT_IN_PS_LEVEL(ppsc, _PS_FLAG)		((ppsc->cur_ps_level & _PS_FLAG) ? true : false)
124 #define	RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG)	(ppsc->cur_ps_level &= (~(_PS_FLAG)))
125 #define	RT_SET_PS_LEVEL(ppsc, _PS_FLAG)		(ppsc->cur_ps_level |= _PS_FLAG)
126 
127 /*  ASPM OSC Control bit, added by Roger, 2013.03.29. */
128 #define	RT_PCI_ASPM_OSC_IGNORE		0	 /*  PCI ASPM ignore OSC control in default */
129 #define	RT_PCI_ASPM_OSC_ENABLE		BIT0 /*  PCI ASPM controlled by OS according to ACPI Spec 5.0 */
130 #define	RT_PCI_ASPM_OSC_DISABLE		BIT1 /*  PCI ASPM controlled by driver or BIOS, i.e., force enable ASPM */
131 
132 
133 enum _PS_BBRegBackup_ {
134 	PSBBREG_RF0 = 0,
135 	PSBBREG_RF1,
136 	PSBBREG_RF2,
137 	PSBBREG_AFE0,
138 	PSBBREG_TOTALCNT
139 };
140 
141 enum { /*  for ips_mode */
142 	IPS_NONE = 0,
143 	IPS_NORMAL,
144 	IPS_LEVEL_2,
145 	IPS_NUM
146 };
147 
148 /*  Design for pwrctrl_priv.ips_deny, 32 bits for 32 reasons at most */
149 enum PS_DENY_REASON {
150 	PS_DENY_DRV_INITIAL = 0,
151 	PS_DENY_SCAN,
152 	PS_DENY_JOIN,
153 	PS_DENY_DISCONNECT,
154 	PS_DENY_SUSPEND,
155 	PS_DENY_IOCTL,
156 	PS_DENY_MGNT_TX,
157 	PS_DENY_DRV_REMOVE = 30,
158 	PS_DENY_OTHERS = 31
159 };
160 
161 #ifdef CONFIG_PNO_SUPPORT
162 struct pno_nlo_info {
163 	u32 fast_scan_period;				/* Fast scan period */
164 	u32 ssid_num;				/* number of entry */
165 	u32 slow_scan_period;			/* slow scan period */
166 	u32 fast_scan_iterations;			/* Fast scan iterations */
167 	u8 ssid_length[MAX_PNO_LIST_COUNT];	/* SSID Length Array */
168 	u8 ssid_cipher_info[MAX_PNO_LIST_COUNT];	/* Cipher information for security */
169 	u8 ssid_channel_info[MAX_PNO_LIST_COUNT];	/* channel information */
170 };
171 
172 struct pno_ssid {
173 	u32 	SSID_len;
174 	u8 SSID[32];
175 };
176 
177 struct pno_ssid_list {
178 	struct pno_ssid	node[MAX_PNO_LIST_COUNT];
179 };
180 
181 struct pno_scan_channel_info {
182 	u8 channel;
183 	u8 tx_power;
184 	u8 timeout;
185 	u8 active;				/* set 1 means active scan, or pasivite scan. */
186 };
187 
188 struct pno_scan_info {
189 	u8 enableRFE;			/* Enable RFE */
190 	u8 period_scan_time;		/* exclusive with fast_scan_period and slow_scan_period */
191 	u8 periodScan;			/* exclusive with fast_scan_period and slow_scan_period */
192 	u8 orig_80_offset;			/* original channel 80 offset */
193 	u8 orig_40_offset;			/* original channel 40 offset */
194 	u8 orig_bw;			/* original bandwidth */
195 	u8 orig_ch;			/* original channel */
196 	u8 channel_num;			/* number of channel */
197 	u64	rfe_type;			/* rfe_type && 0x00000000000000ff */
198 	struct pno_scan_channel_info ssid_channel_info[MAX_SCAN_LIST_COUNT];
199 };
200 #endif /* CONFIG_PNO_SUPPORT */
201 
202 struct pwrctrl_priv {
203 	struct mutex lock;
204 	volatile u8 rpwm; /*  requested power state for fw */
205 	volatile u8 cpwm; /*  fw current power state. updated when 1. read from HCPWM 2. driver lowers power level */
206 	volatile u8 tog; /*  toggling */
207 	volatile u8 cpwm_tog; /*  toggling */
208 
209 	u8 pwr_mode;
210 	u8 smart_ps;
211 	u8 bcn_ant_mode;
212 	u8 dtim;
213 
214 	u32 alives;
215 	_workitem cpwm_event;
216 	u8 brpwmtimeout;
217 	_workitem rpwmtimeoutwi;
218 	_timer pwr_rpwm_timer;
219 	u8 bpower_saving; /* for LPS/IPS */
220 
221 	u8 b_hw_radio_off;
222 	u8 reg_rfoff;
223 	u8 reg_pdnmode; /* powerdown mode */
224 	u32 rfoff_reason;
225 
226 	/* RF OFF Level */
227 	u32 cur_ps_level;
228 	u32 reg_rfps_level;
229 
230 	uint	ips_enter_cnts;
231 	uint	ips_leave_cnts;
232 
233 	u8 ips_mode;
234 	u8 ips_org_mode;
235 	u8 ips_mode_req; /*  used to accept the mode setting request, will update to ipsmode later */
236 	bool bips_processing;
237 	unsigned long ips_deny_time; /* will deny IPS when system time is smaller than this */
238 	u8 pre_ips_type;/*  0: default flow, 1: carddisbale flow */
239 
240 	/*  ps_deny: if 0, power save is free to go; otherwise deny all kinds of power save. */
241 	/*  Use PS_DENY_REASON to decide reason. */
242 	/*  Don't access this variable directly without control function, */
243 	/*  and this variable should be protected by lock. */
244 	u32 ps_deny;
245 
246 	u8 ps_processing; /* temporarily used to mark whether in rtw_ps_processor */
247 
248 	u8 fw_psmode_iface_id;
249 	u8 bLeisurePs;
250 	u8 LpsIdleCount;
251 	u8 power_mgnt;
252 	u8 org_power_mgnt;
253 	u8 bFwCurrentInPSMode;
254 	unsigned long	DelayLPSLastTimeStamp;
255 	s32		pnp_current_pwr_state;
256 	u8 pnp_bstop_trx;
257 
258 
259 	u8 bInternalAutoSuspend;
260 	u8 bInSuspend;
261 
262 	u8 bAutoResume;
263 	u8 autopm_cnt;
264 
265 	u8 bSupportRemoteWakeup;
266 	u8 wowlan_wake_reason;
267 	u8 wowlan_ap_mode;
268 	u8 wowlan_mode;
269 #ifdef CONFIG_WOWLAN
270 	u8 wowlan_pattern;
271 	u8 wowlan_magic;
272 	u8 wowlan_unicast;
273 	u8 wowlan_pattern_idx;
274 	u8 wowlan_pno_enable;
275 #ifdef CONFIG_PNO_SUPPORT
276 	u8 pno_in_resume;
277 	u8 pno_inited;
278 	struct pno_nlo_info *pnlo_info;
279 	struct pno_scan_info *pscan_info;
280 	struct pno_ssid_list *pno_ssid_list;
281 #endif
282 	u32 	wowlan_pattern_context[8][5];
283 	u64		wowlan_fw_iv;
284 #endif /*  CONFIG_WOWLAN */
285 	_timer	pwr_state_check_timer;
286 	struct adapter *adapter;
287 	int		pwr_state_check_interval;
288 	u8 pwr_state_check_cnts;
289 
290 	int		ps_flag; /* used by autosuspend */
291 
292 	enum rt_rf_power_state	rf_pwrstate;/* cur power state, only for IPS */
293 	/* rt_rf_power_state	current_rfpwrstate; */
294 	enum rt_rf_power_state	change_rfpwrstate;
295 
296 	u8 bHWPowerdown; /* power down mode selection. 0:radio off, 1:power down */
297 	u8 bHWPwrPindetect; /* come from registrypriv.hwpwrp_detect. enable power down function. 0:disable, 1:enable */
298 	u8 bkeepfwalive;
299 	u8 brfoffbyhw;
300 	unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
301 };
302 
303 #define rtw_get_ips_mode_req(pwrctl) \
304 	(pwrctl)->ips_mode_req
305 
306 #define rtw_ips_mode_req(pwrctl, ips_mode) \
307 	(pwrctl)->ips_mode_req = (ips_mode)
308 
309 #define RTW_PWR_STATE_CHK_INTERVAL 2000
310 
311 #define _rtw_set_pwr_state_check_timer(pwrctl, ms) \
312 	do { \
313 		/*DBG_871X("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __func__, (pwrctl), (ms));*/ \
314 		_set_timer(&(pwrctl)->pwr_state_check_timer, (ms)); \
315 	} while (0)
316 
317 #define rtw_set_pwr_state_check_timer(pwrctl) \
318 	_rtw_set_pwr_state_check_timer((pwrctl), (pwrctl)->pwr_state_check_interval)
319 
320 extern void rtw_init_pwrctrl_priv(struct adapter *adapter);
321 extern void rtw_free_pwrctrl_priv(struct adapter * adapter);
322 
323 s32 rtw_register_task_alive(struct adapter *, u32 task);
324 void rtw_unregister_task_alive(struct adapter *, u32 task);
325 extern s32 rtw_register_tx_alive(struct adapter *padapter);
326 extern void rtw_unregister_tx_alive(struct adapter *padapter);
327 extern s32 rtw_register_cmd_alive(struct adapter *padapter);
328 extern void rtw_unregister_cmd_alive(struct adapter *padapter);
329 extern void cpwm_int_hdl(struct adapter *padapter, struct reportpwrstate_parm *preportpwrstate);
330 extern void LPS_Leave_check(struct adapter *padapter);
331 
332 extern void LeaveAllPowerSaveMode(struct adapter * Adapter);
333 extern void LeaveAllPowerSaveModeDirect(struct adapter * Adapter);
334 void _ips_enter(struct adapter *padapter);
335 void ips_enter(struct adapter *padapter);
336 int _ips_leave(struct adapter *padapter);
337 int ips_leave(struct adapter *padapter);
338 
339 void rtw_ps_processor(struct adapter *padapter);
340 
341 s32 LPS_RF_ON_check(struct adapter *padapter, u32 delay_ms);
342 void LPS_Enter(struct adapter *padapter, const char *msg);
343 void LPS_Leave(struct adapter *padapter, const char *msg);
344 void traffic_check_for_leave_lps(struct adapter *padapter, u8 tx, u32 tx_packets);
345 void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg);
346 void rtw_set_rpwm(struct adapter *padapter, u8 val8);
347 
348 void rtw_set_ips_deny(struct adapter *padapter, u32 ms);
349 int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *caller);
350 #define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __func__)
351 #define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __func__)
352 int rtw_pm_set_ips(struct adapter *padapter, u8 mode);
353 int rtw_pm_set_lps(struct adapter *padapter, u8 mode);
354 
355 void rtw_ps_deny(struct adapter *padapter, enum PS_DENY_REASON reason);
356 void rtw_ps_deny_cancel(struct adapter *padapter, enum PS_DENY_REASON reason);
357 u32 rtw_ps_deny_get(struct adapter *padapter);
358 
359 #endif  /* __RTL871X_PWRCTRL_H_ */
360