/drivers/pinctrl/qcom/ |
D | pinctrl-ssbi-gpio.c | 323 u8 banks = 0; in pm8xxx_pin_config_set() local 333 banks |= BIT(2); in pm8xxx_pin_config_set() 335 banks |= BIT(3); in pm8xxx_pin_config_set() 339 banks |= BIT(2); in pm8xxx_pin_config_set() 341 banks |= BIT(3); in pm8xxx_pin_config_set() 352 banks |= BIT(2); in pm8xxx_pin_config_set() 354 banks |= BIT(3); in pm8xxx_pin_config_set() 358 banks |= BIT(3); in pm8xxx_pin_config_set() 362 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set() 367 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set() [all …]
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/drivers/clk/tegra/ |
D | clk.c | 208 static int tegra_clk_periph_ctx_init(int banks) in tegra_clk_periph_ctx_init() argument 210 periph_state_ctx = kcalloc(2 * banks, sizeof(*periph_state_ctx), in tegra_clk_periph_ctx_init() 218 struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks) in tegra_clk_init() argument 222 if (WARN_ON(banks > ARRAY_SIZE(periph_regs))) in tegra_clk_init() 225 periph_clk_enb_refcnt = kcalloc(32 * banks, in tegra_clk_init() 231 periph_banks = banks; in tegra_clk_init() 242 if (tegra_clk_periph_ctx_init(banks)) { in tegra_clk_init()
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/drivers/memory/ |
D | fsl_ifc.c | 54 for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { in fsl_ifc_find() 206 int version, banks; in fsl_ifc_ctrl_probe() local 236 banks = (version == FSL_IFC_VERSION_1_0_0) ? 4 : 8; in fsl_ifc_ctrl_probe() 238 version >> 24, (version >> 16) & 0xf, banks); in fsl_ifc_ctrl_probe() 241 fsl_ifc_ctrl_dev->banks = banks; in fsl_ifc_ctrl_probe()
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/drivers/crypto/qat/qat_common/ |
D | adf_isr.c | 132 struct adf_etr_bank_data *bank = &etr_data->banks[i]; in adf_request_irqs() 179 free_irq(msixe[i].vector, &etr_data->banks[i]); in adf_free_irqs() 243 tasklet_init(&priv_data->banks[i].resp_handler, in adf_setup_bh() 245 (unsigned long)&priv_data->banks[i]); in adf_setup_bh() 256 tasklet_disable(&priv_data->banks[i].resp_handler); in adf_cleanup_bh() 257 tasklet_kill(&priv_data->banks[i].resp_handler); in adf_cleanup_bh()
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D | adf_vf_isr.c | 187 struct adf_etr_bank_data *bank = &etr_data->banks[0]; in adf_isr() 225 tasklet_init(&priv_data->banks[0].resp_handler, adf_response_handler, in adf_setup_bh() 226 (unsigned long)priv_data->banks); in adf_setup_bh() 234 tasklet_disable(&priv_data->banks[0].resp_handler); in adf_cleanup_bh() 235 tasklet_kill(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
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D | adf_transport.c | 228 bank = &transport_data->banks[bank_num]; in adf_create_ring() 432 etr_data->banks = kzalloc_node(size, GFP_KERNEL, in adf_init_etr_data() 434 if (!etr_data->banks) { in adf_init_etr_data() 448 ret = adf_init_bank(accel_dev, &etr_data->banks[i], i, in adf_init_etr_data() 458 kfree(etr_data->banks); in adf_init_etr_data() 491 cleanup_bank(&etr_data->banks[i]); in adf_cleanup_etr_handles() 511 kfree(etr_data->banks); in adf_cleanup_etr_data()
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D | adf_hw_arbiter.c | 38 void __iomem *csr = accel_dev->transport->banks[0].csr_addr; in adf_init_arb() 81 csr = accel_dev->transport->banks[0].csr_addr; in adf_exit_arb()
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D | adf_transport_internal.h | 45 struct adf_etr_bank_data *banks; member
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D | qat_crypto.c | 119 int banks = GET_MAX_BANKS(accel_dev); in qat_crypto_dev_config() local 120 int instances = min(cpus, banks); in qat_crypto_dev_config()
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/drivers/phy/mediatek/ |
D | Kconfig | 14 different banks layout, the T-PHY with shared banks between 16 so you can easily distinguish them by banks layout.
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/drivers/pinctrl/vt8500/ |
D | pinctrl-wmt.c | 89 u32 reg_en = data->banks[bank].reg_en; in wmt_set_pinmux() 90 u32 reg_dir = data->banks[bank].reg_dir; in wmt_set_pinmux() 426 u32 reg_pull_en = data->banks[bank].reg_pull_en; in wmt_pinconf_set() 427 u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg; in wmt_pinconf_set() 485 u32 reg_dir = data->banks[bank].reg_dir; in wmt_gpio_get_direction() 500 u32 reg_data_in = data->banks[bank].reg_data_in; in wmt_gpio_get_value() 516 u32 reg_data_out = data->banks[bank].reg_data_out; in wmt_gpio_set_value()
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D | pinctrl-wmt.h | 57 const struct wmt_pinctrl_bank_registers *banks; member
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/drivers/gpio/ |
D | gpio-pxa.c | 82 struct pxa_gpio_bank *banks; member 151 for (i = 0, b = pc->banks; i <= pxa_last_gpio; i += 32, b++) 163 struct pxa_gpio_bank *bank = p->banks + (gpio / 32); in gpio_bank_base() 171 return chip_to_pxachip(c)->banks + gpio / 32; in gpio_to_pxabank() 353 pchip->banks = devm_kcalloc(pchip->dev, nbanks, sizeof(*pchip->banks), in pxa_init_gpio_chip() 355 if (!pchip->banks) in pxa_init_gpio_chip() 375 bank = pchip->banks + i; in pxa_init_gpio_chip()
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D | gpio-bcm-kona.c | 72 struct bcm_kona_gpio_bank *banks; member 602 kona_gpio->banks = devm_kcalloc(dev, in bcm_kona_gpio_probe() 604 sizeof(*kona_gpio->banks), in bcm_kona_gpio_probe() 606 if (!kona_gpio->banks) in bcm_kona_gpio_probe() 630 bank = &kona_gpio->banks[i]; in bcm_kona_gpio_probe() 651 bank = &kona_gpio->banks[i]; in bcm_kona_gpio_probe()
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D | gpio-aspeed.c | 664 unsigned int i, p, girq, banks; in aspeed_gpio_irq_handler() local 670 banks = DIV_ROUND_UP(gpio->chip.ngpio, 32); in aspeed_gpio_irq_handler() 671 for (i = 0; i < banks; i++) { in aspeed_gpio_irq_handler() 1143 int rc, i, banks, err; in aspeed_gpio_probe() local 1186 banks = DIV_ROUND_UP(gpio->chip.ngpio, 32); in aspeed_gpio_probe() 1188 banks, sizeof(u32), GFP_KERNEL); in aspeed_gpio_probe() 1196 for (i = 0; i < banks; i++) { in aspeed_gpio_probe()
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/drivers/pinctrl/ |
D | pinctrl-equilibrium.c | 854 struct eqbr_pin_bank *banks; in pinbank_probe() local 870 banks = devm_kcalloc(dev, nr_gpio, sizeof(*banks), GFP_KERNEL); in pinbank_probe() 871 if (!banks) in pinbank_probe() 886 pinbank_init(np_gpio, drvdata, banks + i, i); in pinbank_probe() 889 gctrls[i].bank = banks + i; in pinbank_probe() 893 drvdata->pin_banks = banks; in pinbank_probe()
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D | pinctrl-st.c | 324 struct st_gpio_bank *banks; member 1149 struct st_pio_control *pc = &info->banks[bank].pc; in st_parse_syscfgs() 1452 __gpio_irq_handler(&info->banks[n]); in st_gpio_irqmux_handler() 1482 struct st_gpio_bank *bank = &info->banks[bank_nr]; in st_gpiolib_register_bank() 1606 info->banks = devm_kcalloc(&pdev->dev, in st_pctl_probe_dt() 1607 info->nbanks, sizeof(*info->banks), GFP_KERNEL); in st_pctl_probe_dt() 1609 if (!info->functions || !info->groups || !info->banks) in st_pctl_probe_dt() 1652 k = info->banks[bank].range.pin_base; in st_pctl_probe_dt() 1653 bank_name = info->banks[bank].range.name; in st_pctl_probe_dt() 1714 pinctrl_add_gpio_range(info->pctl, &info->banks[i].range); in st_pctl_probe()
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/drivers/pinctrl/stm32/ |
D | pinctrl-stm32.c | 106 struct stm32_gpio_bank *banks; member 1244 struct stm32_gpio_bank *bank = &pctl->banks[pctl->nbanks]; in stm32_gpiolib_register_bank() 1291 &pctl->banks[bank_nr].range); in stm32_gpiolib_register_bank() 1463 int i, ret, hwlock_id, banks = 0; in stm32_pctl_probe() local 1556 banks++; in stm32_pctl_probe() 1558 if (!banks) { in stm32_pctl_probe() 1562 pctl->banks = devm_kcalloc(dev, banks, sizeof(*pctl->banks), in stm32_pctl_probe() 1564 if (!pctl->banks) in stm32_pctl_probe() 1569 struct stm32_gpio_bank *bank = &pctl->banks[i]; in stm32_pctl_probe()
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/drivers/pinctrl/samsung/ |
D | pinctrl-exynos.h | 130 struct samsung_pin_bank *banks[]; member
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/drivers/edac/ |
D | skx_common.c | 309 int banks = 16, ranks, rows, cols, npages; in skx_get_dimm_info() local 319 size = ((1ull << (rows + cols + ranks)) * banks) >> (20 - 3); in skx_get_dimm_info() 324 banks, 1 << ranks, rows, cols); in skx_get_dimm_info()
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D | i7core_edac.c | 418 static const int banks[] = { 4, 8, 16, -EINVAL }; in numbank() local 420 return banks[bank & 0x3]; in numbank() 582 u32 banks, ranks, rows, cols; in get_dimm_config() local 589 banks = numbank(MC_DOD_NUMBANK(dimm_dod[j])); in get_dimm_config() 595 size = (rows * cols * banks * ranks) >> (20 - 3); in get_dimm_config() 600 banks, ranks, rows, cols); in get_dimm_config() 606 switch (banks) { in get_dimm_config()
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/drivers/pinctrl/meson/ |
D | pinctrl-meson.h | 116 struct meson_bank *banks; member
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D | pinctrl-meson.c | 78 if (pin >= pc->data->banks[i].first && in meson_get_bank() 79 pin <= pc->data->banks[i].last) { in meson_get_bank() 80 *bank = &pc->data->banks[i]; in meson_get_bank()
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/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
D | ramnv50.c | 508 int colbits, rowbitsa, rowbitsb, banks; in nv50_fb_vram_rblock() local 521 banks = 1 << (((r4 & 0x03000000) >> 24) + 2); in nv50_fb_vram_rblock() 523 rowsize = ram->parts * banks * (1 << colbits) * 8; in nv50_fb_vram_rblock()
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/drivers/thermal/ |
D | mtk_thermal.c | 292 struct mtk_thermal_bank banks[MAX_NUM_ZONES]; member 687 struct mtk_thermal_bank *bank = &mt->banks[i]; in mtk_read_temp() 709 struct mtk_thermal_bank *bank = &mt->banks[num]; in mtk_thermal_init_bank()
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