Home
last modified time | relevance | path

Searched refs:cdv_sb_write (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/gma500/
Dcdv_intel_display.c156 int cdv_sb_write(struct drm_device *dev, u32 reg, u32 val) in cdv_sb_write() function
233 cdv_sb_write(dev, SB_REF_SFR(pipe), ref_value); in cdv_dpll_set_clock_cdv()
263 ret = cdv_sb_write(dev, ref_sfr, ref_value); in cdv_dpll_set_clock_cdv()
272 ret = cdv_sb_write(dev, SB_M(pipe), m); in cdv_dpll_set_clock_cdv()
303 ret = cdv_sb_write(dev, SB_N_VCO(pipe), n_vco); in cdv_dpll_set_clock_cdv()
329 ret = cdv_sb_write(dev, SB_P(pipe), p); in cdv_dpll_set_clock_cdv()
339 cdv_sb_write(dev, lane_reg, lane_value); in cdv_dpll_set_clock_cdv()
345 cdv_sb_write(dev, lane_reg, lane_value); in cdv_dpll_set_clock_cdv()
351 cdv_sb_write(dev, lane_reg, lane_value); in cdv_dpll_set_clock_cdv()
357 cdv_sb_write(dev, lane_reg, lane_value); in cdv_dpll_set_clock_cdv()
Dcdv_intel_dp.c1431 cdv_sb_write(dev, ddi_reg->VSwing5, 0x0505313A); in cdv_intel_dp_set_vswing_premph()
1434 cdv_sb_write(dev, ddi_reg->VSwing1, 0x43406055); in cdv_intel_dp_set_vswing_premph()
1441 cdv_sb_write(dev, ddi_reg->VSwing2, 0x055738954); in cdv_intel_dp_set_vswing_premph()
1443 cdv_sb_write(dev, ddi_reg->VSwing2, dp_vswing_premph_table[index]); in cdv_intel_dp_set_vswing_premph()
1447 cdv_sb_write(dev, ddi_reg->VSwing3, 0x70802040); in cdv_intel_dp_set_vswing_premph()
1449 cdv_sb_write(dev, ddi_reg->VSwing3, 0x40802040); in cdv_intel_dp_set_vswing_premph()
1455 cdv_sb_write(dev, ddi_reg->VSwing1, 0xc3406055); in cdv_intel_dp_set_vswing_premph()
1460 cdv_sb_write(dev, ddi_reg->PreEmph1, 0x1f030040); in cdv_intel_dp_set_vswing_premph()
1464 cdv_sb_write(dev, ddi_reg->PreEmph2, dp_vswing_premph_table[index]); in cdv_intel_dp_set_vswing_premph()
Dpsb_intel_drv.h253 extern int cdv_sb_write(struct drm_device *dev, u32 reg, u32 val);