| /drivers/clk/spear/ |
| D | spear1340_clock.c | 444 struct clk *clk, *clk1; in spear1340_clk_init() local
477 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
479 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear1340_clk_init()
488 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
490 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear1340_clk_init()
499 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
501 clk_register_clkdev(clk1, "pll3_clk", NULL); in spear1340_clk_init()
505 ARRAY_SIZE(pll4_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
507 clk_register_clkdev(clk1, "pll4_clk", NULL); in spear1340_clk_init()
634 aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); in spear1340_clk_init()
[all …]
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| D | spear3xx_clock.c | 392 struct clk *clk, *clk1, *ras_apb_clk; in spear3xx_clk_init() local
416 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear3xx_clk_init()
418 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear3xx_clk_init()
422 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear3xx_clk_init()
424 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear3xx_clk_init()
438 &_lock, &clk1); in spear3xx_clk_init()
440 clk_register_clkdev(clk1, "uart_syn_gclk", NULL); in spear3xx_clk_init()
456 &_lock, &clk1); in spear3xx_clk_init()
458 clk_register_clkdev(clk1, "firda_syn_gclk", NULL); in spear3xx_clk_init()
508 &_lock, &clk1); in spear3xx_clk_init()
[all …]
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| D | spear6xx_clock.c | 118 struct clk *clk, *clk1; in spear6xx_clk_init() local
138 &_lock, &clk1, NULL); in spear6xx_clk_init()
140 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear6xx_clk_init()
144 &_lock, &clk1, NULL); in spear6xx_clk_init()
146 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear6xx_clk_init()
164 &_lock, &clk1); in spear6xx_clk_init()
166 clk_register_clkdev(clk1, "uart_syn_gclk", NULL); in spear6xx_clk_init()
184 &_lock, &clk1); in spear6xx_clk_init()
186 clk_register_clkdev(clk1, "firda_syn_gclk", NULL); in spear6xx_clk_init()
200 &_lock, &clk1); in spear6xx_clk_init()
[all …]
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| D | spear1310_clock.c | 387 struct clk *clk, *clk1; in spear1310_clk_init() local
420 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
422 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear1310_clk_init()
431 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
433 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear1310_clk_init()
442 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
444 clk_register_clkdev(clk1, "pll3_clk", NULL); in spear1310_clk_init()
448 ARRAY_SIZE(pll4_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
450 clk_register_clkdev(clk1, "pll4_clk", NULL); in spear1310_clk_init()
555 ARRAY_SIZE(aux_rtbl), &_lock, &clk1); in spear1310_clk_init()
[all …]
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| /drivers/clk/ti/ |
| D | clk-33xx.c | 278 struct clk *clk1, *clk2; in am33xx_dt_clk_init() local
301 clk1 = clk_get_sys(NULL, "sys_clkin_ck"); in am33xx_dt_clk_init()
303 clk_set_parent(clk2, clk1); in am33xx_dt_clk_init()
306 clk_set_parent(clk2, clk1); in am33xx_dt_clk_init()
314 clk1 = clk_get_sys(NULL, "wdt1_fck"); in am33xx_dt_clk_init()
316 clk_set_parent(clk1, clk2); in am33xx_dt_clk_init()
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| D | clk-43xx.c | 277 struct clk *clk1, *clk2; in am43xx_dt_clk_init() local
298 clk1 = clk_get_sys(NULL, "cpsw_cpts_rft_clk"); in am43xx_dt_clk_init()
300 clk_set_parent(clk1, clk2); in am43xx_dt_clk_init()
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| D | adpll.c | 274 struct clk *clk1, in ti_adpll_init_mux() argument
286 parents[1] = __clk_get_name(clk1); in ti_adpll_init_mux()
583 struct clk *clk1) in ti_adpll_init_clkout() argument
614 parent_names[1] = __clk_get_name(clk1); in ti_adpll_init_clkout()
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| /drivers/clocksource/ |
| D | timer-sp804.c | 274 struct clk *clk1, *clk2; in sp804_of_init() local
293 clk1 = of_clk_get(np, 0); in sp804_of_init()
294 if (IS_ERR(clk1)) in sp804_of_init()
295 clk1 = NULL; in sp804_of_init()
306 clk2 = clk1; in sp804_of_init()
322 name, clk1, 1); in sp804_of_init()
327 ret = sp804_clockevents_init(timer1_base, irq, clk1, name); in sp804_of_init()
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| /drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | gf100.c | 279 u32 clk0, clk1 = 0; in calc_clk() local
292 clk1 = calc_pll(clk, idx, freq, &info->coef); in calc_clk()
294 clk1 = cstate->domain[nv_clk_src_hubk06]; in calc_clk()
295 clk1 = calc_div(clk, idx, clk1, freq, &div1P); in calc_clk()
299 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
318 info->freq = clk1; in calc_clk()
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| D | gk104.c | 293 u32 clk0, clk1 = 0; in calc_clk() local
306 clk1 = calc_pll(clk, idx, freq, &info->coef); in calc_clk()
308 clk1 = cstate->domain[nv_clk_src_hubk06]; in calc_clk()
309 clk1 = calc_div(clk, idx, clk1, freq, &div1P); in calc_clk()
313 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
332 info->freq = clk1; in calc_clk()
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| D | mcp77.c | 187 u32 clk0 = src, clk1 = src; in calc_P() local
190 clk1 = clk0 << (*div ? 1 : 0); in calc_P()
196 if (target - clk0 <= clk1 - target) in calc_P()
199 return clk1; in calc_P()
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| D | nv50.c | 346 u32 clk0 = src, clk1 = src; in calc_div() local
349 clk1 = clk0 << (*div ? 1 : 0); in calc_div()
355 if (target - clk0 <= clk1 - target) in calc_div()
358 return clk1; in calc_div()
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| /drivers/clk/rockchip/ |
| D | clk-rk3188.c | 812 struct clk *clk1, *clk2; in rk3188a_clk_init() local
831 clk1 = __clk_lookup("aclk_cpu_pre"); in rk3188a_clk_init()
833 if (clk1 && clk2) { in rk3188a_clk_init()
834 rate = clk_get_rate(clk1); in rk3188a_clk_init()
836 ret = clk_set_parent(clk1, clk2); in rk3188a_clk_init()
841 clk_set_rate(clk1, rate); in rk3188a_clk_init()
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| /drivers/clk/zynq/ |
| D | clkc.c | 175 enum zynq_clk clk1, const char *clk_name0, in zynq_clk_register_periph_clk() argument
201 clks[clk1] = clk_register_gate(NULL, clk_name1, div_name, in zynq_clk_register_periph_clk()
212 clks[clk1] = ERR_PTR(-ENOMEM); in zynq_clk_register_periph_clk()
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| /drivers/pinctrl/ |
| D | pinctrl-lpc18xx.c | 415 LPC_N(clk1, 0xc04, EMC, CLKOUT, R, R, R, CGU_OUT, R, I2S1, 0, HS);
624 LPC18XX_PIN(clk1, PIN_CLK1),
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