| /drivers/clk/at91/ |
| D | pmc.h | 20 struct clk_hw **chws;
22 struct clk_hw **shws;
24 struct clk_hw **phws;
26 struct clk_hw **ghws;
28 struct clk_hw **pchws;
30 struct clk_hw *hwtable[];
113 struct clk_hw *of_clk_hw_pmc_get(struct of_phandle_args *clkspec, void *data);
115 struct clk_hw * __init
119 struct clk_hw * __init
123 struct clk_hw * __init
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| D | clk-main.c | 29 struct clk_hw hw;
36 struct clk_hw hw;
45 struct clk_hw hw;
52 struct clk_hw hw;
68 static int clk_main_osc_prepare(struct clk_hw *hw) in clk_main_osc_prepare()
91 static void clk_main_osc_unprepare(struct clk_hw *hw) in clk_main_osc_unprepare()
108 static int clk_main_osc_is_prepared(struct clk_hw *hw) in clk_main_osc_is_prepared()
129 struct clk_hw * __init
137 struct clk_hw *hw; in at91_clk_register_main_osc()
181 static int clk_main_rc_osc_prepare(struct clk_hw *hw) in clk_main_rc_osc_prepare()
[all …]
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| D | clk-usb.c | 25 struct clk_hw hw;
35 struct clk_hw hw;
43 static unsigned long at91sam9x5_clk_usb_recalc_rate(struct clk_hw *hw, in at91sam9x5_clk_usb_recalc_rate()
56 static int at91sam9x5_clk_usb_determine_rate(struct clk_hw *hw, in at91sam9x5_clk_usb_determine_rate()
59 struct clk_hw *parent; in at91sam9x5_clk_usb_determine_rate()
110 static int at91sam9x5_clk_usb_set_parent(struct clk_hw *hw, u8 index) in at91sam9x5_clk_usb_set_parent()
122 static u8 at91sam9x5_clk_usb_get_parent(struct clk_hw *hw) in at91sam9x5_clk_usb_get_parent()
132 static int at91sam9x5_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate, in at91sam9x5_clk_usb_set_rate()
159 static int at91sam9n12_clk_usb_enable(struct clk_hw *hw) in at91sam9n12_clk_usb_enable()
169 static void at91sam9n12_clk_usb_disable(struct clk_hw *hw) in at91sam9n12_clk_usb_disable()
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| D | clk-utmi.c | 23 struct clk_hw hw;
39 static int clk_utmi_prepare(struct clk_hw *hw) in clk_utmi_prepare()
41 struct clk_hw *hw_parent; in clk_utmi_prepare()
94 static int clk_utmi_is_prepared(struct clk_hw *hw) in clk_utmi_is_prepared()
101 static void clk_utmi_unprepare(struct clk_hw *hw) in clk_utmi_unprepare()
109 static unsigned long clk_utmi_recalc_rate(struct clk_hw *hw, in clk_utmi_recalc_rate()
123 static struct clk_hw * __init
130 struct clk_hw *hw; in at91_clk_register_utmi_internal()
158 struct clk_hw * __init
166 static int clk_utmi_sama7g5_prepare(struct clk_hw *hw) in clk_utmi_sama7g5_prepare()
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| D | sckc.c | 30 struct clk_hw hw;
39 struct clk_hw hw;
49 struct clk_hw hw;
60 struct clk_hw hw;
68 static int clk_slow_osc_prepare(struct clk_hw *hw) in clk_slow_osc_prepare()
87 static void clk_slow_osc_unprepare(struct clk_hw *hw) in clk_slow_osc_unprepare()
99 static int clk_slow_osc_is_prepared(struct clk_hw *hw) in clk_slow_osc_is_prepared()
117 static struct clk_hw * __init
126 struct clk_hw *hw; in at91_clk_register_slow_osc()
162 static void at91_clk_unregister_slow_osc(struct clk_hw *hw) in at91_clk_unregister_slow_osc()
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| D | clk-audio-pll.c | 59 struct clk_hw hw;
66 struct clk_hw hw;
73 struct clk_hw hw;
82 static int clk_audio_pll_frac_enable(struct clk_hw *hw) in clk_audio_pll_frac_enable()
107 static int clk_audio_pll_pad_enable(struct clk_hw *hw) in clk_audio_pll_pad_enable()
120 static int clk_audio_pll_pmc_enable(struct clk_hw *hw) in clk_audio_pll_pmc_enable()
132 static void clk_audio_pll_frac_disable(struct clk_hw *hw) in clk_audio_pll_frac_disable()
143 static void clk_audio_pll_pad_disable(struct clk_hw *hw) in clk_audio_pll_pad_disable()
151 static void clk_audio_pll_pmc_disable(struct clk_hw *hw) in clk_audio_pll_pmc_disable()
173 static unsigned long clk_audio_pll_frac_recalc_rate(struct clk_hw *hw, in clk_audio_pll_frac_recalc_rate()
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| /drivers/clk/ |
| D | clk-composite.c | 10 static u8 clk_composite_get_parent(struct clk_hw *hw) in clk_composite_get_parent()
14 struct clk_hw *mux_hw = composite->mux_hw; in clk_composite_get_parent()
21 static int clk_composite_set_parent(struct clk_hw *hw, u8 index) in clk_composite_set_parent()
25 struct clk_hw *mux_hw = composite->mux_hw; in clk_composite_set_parent()
32 static unsigned long clk_composite_recalc_rate(struct clk_hw *hw, in clk_composite_recalc_rate()
37 struct clk_hw *rate_hw = composite->rate_hw; in clk_composite_recalc_rate()
44 static int clk_composite_determine_rate(struct clk_hw *hw, in clk_composite_determine_rate()
50 struct clk_hw *rate_hw = composite->rate_hw; in clk_composite_determine_rate()
51 struct clk_hw *mux_hw = composite->mux_hw; in clk_composite_determine_rate()
52 struct clk_hw *parent; in clk_composite_determine_rate()
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| D | clk-hi655x.c | 22 struct clk_hw clk_hw; member
25 static unsigned long hi655x_clk_recalc_rate(struct clk_hw *hw, in hi655x_clk_recalc_rate()
31 static int hi655x_clk_enable(struct clk_hw *hw, bool enable) in hi655x_clk_enable()
34 container_of(hw, struct hi655x_clk, clk_hw); in hi655x_clk_enable()
42 static int hi655x_clk_prepare(struct clk_hw *hw) in hi655x_clk_prepare()
47 static void hi655x_clk_unprepare(struct clk_hw *hw) in hi655x_clk_unprepare()
52 static int hi655x_clk_is_prepared(struct clk_hw *hw) in hi655x_clk_is_prepared()
55 container_of(hw, struct hi655x_clk, clk_hw); in hi655x_clk_is_prepared()
93 hi655x_clk->clk_hw.init = &init; in hi655x_clk_probe()
98 ret = devm_clk_hw_register(&pdev->dev, &hi655x_clk->clk_hw); in hi655x_clk_probe()
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| D | clk-axi-clkgen.c | 51 struct clk_hw clk_hw; member
297 static struct axi_clkgen *clk_hw_to_axi_clkgen(struct clk_hw *clk_hw) in clk_hw_to_axi_clkgen() argument
299 return container_of(clk_hw, struct axi_clkgen, clk_hw); in clk_hw_to_axi_clkgen()
318 static int axi_clkgen_set_rate(struct clk_hw *clk_hw, in axi_clkgen_set_rate() argument
321 struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); in axi_clkgen_set_rate()
368 static long axi_clkgen_round_rate(struct clk_hw *hw, unsigned long rate, in axi_clkgen_round_rate()
412 static unsigned long axi_clkgen_recalc_rate(struct clk_hw *clk_hw, in axi_clkgen_recalc_rate() argument
415 struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); in axi_clkgen_recalc_rate()
440 static int axi_clkgen_enable(struct clk_hw *clk_hw) in axi_clkgen_enable() argument
442 struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); in axi_clkgen_enable()
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| D | clk-gpio.c | 45 struct clk_hw hw;
51 static int clk_gpio_gate_enable(struct clk_hw *hw) in clk_gpio_gate_enable()
60 static void clk_gpio_gate_disable(struct clk_hw *hw) in clk_gpio_gate_disable()
67 static int clk_gpio_gate_is_enabled(struct clk_hw *hw) in clk_gpio_gate_is_enabled()
80 static int clk_sleeping_gpio_gate_prepare(struct clk_hw *hw) in clk_sleeping_gpio_gate_prepare()
89 static void clk_sleeping_gpio_gate_unprepare(struct clk_hw *hw) in clk_sleeping_gpio_gate_unprepare()
96 static int clk_sleeping_gpio_gate_is_prepared(struct clk_hw *hw) in clk_sleeping_gpio_gate_is_prepared()
117 static u8 clk_gpio_mux_get_parent(struct clk_hw *hw) in clk_gpio_mux_get_parent()
124 static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index) in clk_gpio_mux_set_parent()
139 static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents, in clk_register_gpio()
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| D | clk-max9485.c | 71 struct clk_hw hw;
86 static inline struct max9485_clk_hw *to_max9485_clk(struct clk_hw *hw) in to_max9485_clk()
110 static int max9485_clk_prepare(struct clk_hw *hw) in max9485_clk_prepare()
112 struct max9485_clk_hw *clk_hw = to_max9485_clk(hw); in max9485_clk_prepare() local
114 return max9485_update_bits(clk_hw->drvdata, in max9485_clk_prepare()
115 clk_hw->enable_bit, in max9485_clk_prepare()
116 clk_hw->enable_bit); in max9485_clk_prepare()
119 static void max9485_clk_unprepare(struct clk_hw *hw) in max9485_clk_unprepare()
121 struct max9485_clk_hw *clk_hw = to_max9485_clk(hw); in max9485_clk_unprepare() local
123 max9485_update_bits(clk_hw->drvdata, clk_hw->enable_bit, 0); in max9485_clk_unprepare()
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| D | clk-rk808.c | 19 struct clk_hw clkout1_hw;
20 struct clk_hw clkout2_hw;
23 static unsigned long rk808_clkout_recalc_rate(struct clk_hw *hw, in rk808_clkout_recalc_rate()
29 static int rk808_clkout2_enable(struct clk_hw *hw, bool enable) in rk808_clkout2_enable()
40 static int rk808_clkout2_prepare(struct clk_hw *hw) in rk808_clkout2_prepare()
45 static void rk808_clkout2_unprepare(struct clk_hw *hw) in rk808_clkout2_unprepare()
50 static int rk808_clkout2_is_prepared(struct clk_hw *hw) in rk808_clkout2_is_prepared()
77 static struct clk_hw *
91 static int rk817_clkout2_enable(struct clk_hw *hw, bool enable) in rk817_clkout2_enable()
103 static int rk817_clkout2_prepare(struct clk_hw *hw) in rk817_clkout2_prepare()
[all …]
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| /drivers/clk/samsung/ |
| D | clk.c | 89 struct clk_hw *clk_hw, unsigned int id) in samsung_clk_add_lookup() argument
92 ctx->clk_data.hws[id] = clk_hw; in samsung_clk_add_lookup()
100 struct clk_hw *clk_hw; in samsung_clk_register_alias() local
110 clk_hw = ctx->clk_data.hws[list->id]; in samsung_clk_register_alias()
111 if (!clk_hw) { in samsung_clk_register_alias()
117 ret = clk_hw_register_clkdev(clk_hw, list->alias, in samsung_clk_register_alias()
130 struct clk_hw *clk_hw; in samsung_clk_register_fixed_rate() local
134 clk_hw = clk_hw_register_fixed_rate(ctx->dev, list->name, in samsung_clk_register_fixed_rate()
136 if (IS_ERR(clk_hw)) { in samsung_clk_register_fixed_rate()
142 samsung_clk_add_lookup(ctx, clk_hw, list->id); in samsung_clk_register_fixed_rate()
[all …]
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| /drivers/clk/ti/ |
| D | clock.h | 20 struct clk_hw hw;
35 struct clk_hw hw;
213 struct clk *of_ti_clk_register(struct device_node *node, struct clk_hw *hw,
216 struct clk_hw *hw, const char *con);
223 struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup);
233 int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int type);
257 int omap2_init_clk_clkdm(struct clk_hw *hw);
258 int omap2_clkops_enable_clkdm(struct clk_hw *hw);
259 void omap2_clkops_disable_clkdm(struct clk_hw *hw);
261 int omap2_dflt_clk_enable(struct clk_hw *hw);
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| D | apll.c | 40 static int dra7_apll_enable(struct clk_hw *hw) in dra7_apll_enable()
91 static void dra7_apll_disable(struct clk_hw *hw) in dra7_apll_disable()
108 static int dra7_apll_is_enabled(struct clk_hw *hw) in dra7_apll_is_enabled()
124 static u8 dra7_init_apll_parent(struct clk_hw *hw) in dra7_init_apll_parent()
139 struct clk_hw *hw = user; in omap_clk_register_apll()
140 struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw); in omap_clk_register_apll() local
141 struct dpll_data *ad = clk_hw->dpll_data; in omap_clk_register_apll()
144 const struct clk_init_data *init = clk_hw->hw.init; in omap_clk_register_apll()
171 clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name); in omap_clk_register_apll()
180 kfree(clk_hw->dpll_data); in omap_clk_register_apll()
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| D | dpll.c | 164 struct clk_hw *hw = user; in _register_dpll()
165 struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw); in _register_dpll() local
166 struct dpll_data *dd = clk_hw->dpll_data; in _register_dpll()
198 clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name); in _register_dpll()
208 kfree(clk_hw->dpll_data); in _register_dpll()
211 kfree(clk_hw); in _register_dpll()
231 struct clk_hw_omap *clk_hw; in _register_dpll_x2() local
241 clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL); in _register_dpll_x2()
242 if (!clk_hw) in _register_dpll_x2()
245 clk_hw->ops = hw_ops; in _register_dpll_x2()
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| D | gate.c | 30 static int omap36xx_gate_clk_enable_with_hsdiv_restore(struct clk_hw *clk);
66 static int omap36xx_gate_clk_enable_with_hsdiv_restore(struct clk_hw *hw) in omap36xx_gate_clk_enable_with_hsdiv_restore()
69 struct clk_hw *parent_hw; in omap36xx_gate_clk_enable_with_hsdiv_restore()
103 struct clk_hw_omap *clk_hw; in _register_gate() local
106 clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL); in _register_gate()
107 if (!clk_hw) in _register_gate()
110 clk_hw->hw.init = &init; in _register_gate()
115 memcpy(&clk_hw->enable_reg, reg, sizeof(*reg)); in _register_gate()
116 clk_hw->enable_bit = bit_idx; in _register_gate()
117 clk_hw->ops = hw_ops; in _register_gate()
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| /drivers/clk/imx/ |
| D | clk.h | 14 void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count);
24 void imx_unregister_hw_clocks(struct clk_hw *hws[], unsigned int count);
143 struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name,
147 struct clk_hw *imx_clk_hw_pllv1(enum imx_pllv1_type type, const char *name,
150 struct clk_hw *imx_clk_hw_pllv2(const char *name, const char *parent,
153 struct clk_hw *imx_clk_hw_frac_pll(const char *name, const char *parent_name,
156 struct clk_hw *imx_clk_hw_sscg_pll(const char *name,
176 struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name,
196 struct clk_hw *imx_clk_hw_pllv4(const char *name, const char *parent_name,
199 struct clk_hw *clk_hw_register_gate2(struct device *dev, const char *name,
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| /drivers/clk/tegra/ |
| D | clk-periph.c | 14 static u8 clk_periph_get_parent(struct clk_hw *hw) in clk_periph_get_parent()
18 struct clk_hw *mux_hw = &periph->mux.hw; in clk_periph_get_parent()
25 static int clk_periph_set_parent(struct clk_hw *hw, u8 index) in clk_periph_set_parent()
29 struct clk_hw *mux_hw = &periph->mux.hw; in clk_periph_set_parent()
36 static unsigned long clk_periph_recalc_rate(struct clk_hw *hw, in clk_periph_recalc_rate()
41 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_recalc_rate()
48 static long clk_periph_round_rate(struct clk_hw *hw, unsigned long rate, in clk_periph_round_rate()
53 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_round_rate()
60 static int clk_periph_set_rate(struct clk_hw *hw, unsigned long rate, in clk_periph_set_rate()
65 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_set_rate()
[all …]
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| /drivers/clk/mediatek/ |
| D | clk-gate.c | 18 static int mtk_cg_bit_is_cleared(struct clk_hw *hw) in mtk_cg_bit_is_cleared()
30 static int mtk_cg_bit_is_set(struct clk_hw *hw) in mtk_cg_bit_is_set()
42 static void mtk_cg_set_bit(struct clk_hw *hw) in mtk_cg_set_bit()
49 static void mtk_cg_clr_bit(struct clk_hw *hw) in mtk_cg_clr_bit()
56 static void mtk_cg_set_bit_no_setclr(struct clk_hw *hw) in mtk_cg_set_bit_no_setclr()
64 static void mtk_cg_clr_bit_no_setclr(struct clk_hw *hw) in mtk_cg_clr_bit_no_setclr()
72 static int mtk_cg_enable(struct clk_hw *hw) in mtk_cg_enable()
79 static void mtk_cg_disable(struct clk_hw *hw) in mtk_cg_disable()
84 static int mtk_cg_enable_inv(struct clk_hw *hw) in mtk_cg_enable_inv()
91 static void mtk_cg_disable_inv(struct clk_hw *hw) in mtk_cg_disable_inv()
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| /drivers/clk/actions/ |
| D | owl-composite.c | 16 static u8 owl_comp_get_parent(struct clk_hw *hw) in owl_comp_get_parent()
23 static int owl_comp_set_parent(struct clk_hw *hw, u8 index) in owl_comp_set_parent()
30 static void owl_comp_disable(struct clk_hw *hw) in owl_comp_disable()
38 static int owl_comp_enable(struct clk_hw *hw) in owl_comp_enable()
48 static int owl_comp_is_enabled(struct clk_hw *hw) in owl_comp_is_enabled()
56 static long owl_comp_div_round_rate(struct clk_hw *hw, unsigned long rate, in owl_comp_div_round_rate()
65 static unsigned long owl_comp_div_recalc_rate(struct clk_hw *hw, in owl_comp_div_recalc_rate()
74 static int owl_comp_div_set_rate(struct clk_hw *hw, unsigned long rate, in owl_comp_div_set_rate()
83 static long owl_comp_fact_round_rate(struct clk_hw *hw, unsigned long rate, in owl_comp_fact_round_rate()
93 static unsigned long owl_comp_fact_recalc_rate(struct clk_hw *hw, in owl_comp_fact_recalc_rate()
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| /drivers/clk/qcom/ |
| D | gcc-ipq6018.c | 74 .parent_hws = (const struct clk_hw *[]){
87 .parent_hws = (const struct clk_hw *[]){
130 .parent_hws = (const struct clk_hw *[]){
161 .parent_hws = (const struct clk_hw *[]){
191 .parent_hws = (const struct clk_hw *[]){
241 .parent_hws = (const struct clk_hw *[]){
271 .parent_hws = (const struct clk_hw *[]){
319 .parent_hws = (const struct clk_hw *[]){
350 .parent_hws = (const struct clk_hw *[]){
690 .parent_hws = (const struct clk_hw *[]){
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| D | mmcc-msm8998.c | 99 .parent_hws = (const struct clk_hw *[]){ &mmpll0.clkr.hw },
132 .parent_hws = (const struct clk_hw *[]){ &mmpll1.clkr.hw },
161 .parent_hws = (const struct clk_hw *[]){ &mmpll3.clkr.hw },
190 .parent_hws = (const struct clk_hw *[]){ &mmpll4.clkr.hw },
219 .parent_hws = (const struct clk_hw *[]){ &mmpll5.clkr.hw },
248 .parent_hws = (const struct clk_hw *[]){ &mmpll6.clkr.hw },
277 .parent_hws = (const struct clk_hw *[]){ &mmpll7.clkr.hw },
306 .parent_hws = (const struct clk_hw *[]){ &mmpll10.clkr.hw },
1221 .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw },
1236 .parent_hws = (const struct clk_hw *[]){ &video_core_clk_src.clkr.hw },
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| /drivers/clk/st/ |
| D | clk-flexgen.c | 25 struct clk_hw hw;
46 static int flexgen_enable(struct clk_hw *hw) in flexgen_enable()
49 struct clk_hw *pgate_hw = &flexgen->pgate.hw; in flexgen_enable()
50 struct clk_hw *fgate_hw = &flexgen->fgate.hw; in flexgen_enable()
63 static void flexgen_disable(struct clk_hw *hw) in flexgen_disable()
66 struct clk_hw *fgate_hw = &flexgen->fgate.hw; in flexgen_disable()
76 static int flexgen_is_enabled(struct clk_hw *hw) in flexgen_is_enabled()
79 struct clk_hw *fgate_hw = &flexgen->fgate.hw; in flexgen_is_enabled()
89 static u8 flexgen_get_parent(struct clk_hw *hw) in flexgen_get_parent()
92 struct clk_hw *mux_hw = &flexgen->mux.hw; in flexgen_get_parent()
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| /drivers/clk/meson/ |
| D | g12a.c | 83 .parent_hws = (const struct clk_hw *[]) {
150 .parent_hws = (const struct clk_hw *[]) {
209 .parent_hws = (const struct clk_hw *[]) {
225 .parent_hws = (const struct clk_hw *[]) { &g12a_sys_pll.hw },
242 .parent_hws = (const struct clk_hw *[]) {
259 .parent_hws = (const struct clk_hw *[]) {
272 .parent_hws = (const struct clk_hw *[]) {
285 .parent_hws = (const struct clk_hw *[]) { &g12a_fixed_pll.hw },
298 .parent_hws = (const struct clk_hw *[]) {
322 .parent_hws = (const struct clk_hw *[]) { &g12a_fixed_pll.hw },
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