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Searched refs:code_size (Results 1 – 15 of 15) sorted by relevance

/drivers/crypto/cavium/nitrox/
Dnitrox_main.c72 __be32 code_size; member
83 u32 code_size; in write_to_ucd_unit() local
106 code_size = roundup(ucode_size, 16); in write_to_ucd_unit()
107 while (code_size) { in write_to_ucd_unit()
112 code_size -= 8; in write_to_ucd_unit()
143 ucode_size = be32_to_cpu(ucode->code_size) * 2; in nitrox_load_fw()
194 ucode_size = be32_to_cpu(ucode->code_size) * 2; in nitrox_load_fw()
/drivers/crypto/cavium/cpt/
Dcptpf_main.c134 if (mcode->code_size == 0) { in cpt_load_microcode()
273 mcode->code_size = code_length * 2; in cpt_ucode_load_fw()
280 mcode->code = dma_alloc_coherent(&cpt->pdev->dev, mcode->code_size, in cpt_ucode_load_fw()
289 mcode->code_size); in cpt_ucode_load_fw()
292 for (j = 0; j < (mcode->code_size / 8); j++) in cpt_ucode_load_fw()
295 for (j = 0; j < (mcode->code_size / 2); j++) in cpt_ucode_load_fw()
298 dev_dbg(dev, "mcode->code_size = %u\n", mcode->code_size); in cpt_ucode_load_fw()
421 dma_free_coherent(&cpt->pdev->dev, mcode->code_size, in cpt_unload_microcode()
Dcptpf.h27 u32 code_size; member
/drivers/staging/media/atomisp/pci/runtime/spctrl/src/
Dspctrl.c32 u32 code_size; member
68 code_addr = hmm_alloc(spctrl_cfg->code_size, HMM_BO_PRIVATE, 0, NULL, 0); in ia_css_spctrl_load_fw()
71 hmm_store(code_addr, spctrl_cfg->code, spctrl_cfg->code_size); in ia_css_spctrl_load_fw()
/drivers/gpu/drm/nouveau/nvkm/subdev/acr/
Dhsfw.c143 hsfw->imem_size = desc->code_size; in nvkm_acr_hsfw_load_bl()
145 hsfw->imem = kmemdup(data + desc->code_off, desc->code_size, GFP_KERNEL); in nvkm_acr_hsfw_load_bl()
Dlsfw.c217 lsfw->bootloader_size = ALIGN(desc->code_size, 256); in nvkm_acr_lsfw_load_bl_inst_data_sig()
/drivers/gpu/drm/nouveau/include/nvfw/
Dfw.h22 u32 code_size; member
/drivers/staging/media/atomisp/pci/runtime/spctrl/interface/
Dia_css_spctrl.h33 u32 code_size; member
/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
Dpmu.h24 u32 code_size; member
/drivers/gpu/drm/nouveau/nvkm/nvfw/
Dfw.c47 nvkm_debug(subdev, "\tcodeSize : 0x%x\n", hdr->code_size); in nvfw_bl_desc()
/drivers/gpu/drm/tegra/
Dfalcon.h72 u32 code_size; member
Dfalcon.c97 falcon->firmware.code.size = os->code_size; in falcon_parse_firmware_image()
/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Dpmu.c96 info->code_size = nvbios_rd32(bios, data + 0x20); in nvbios_pmuRm()
/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
Dgm200.c96 pmu_code(init, pmu.code_addr_pmu, pmu.code_addr, pmu.code_size, true); in pmu_load()
/drivers/staging/media/atomisp/pci/
Dsh_css.c1555 spctrl_cfg->code_size = fw->blob.size; in sh_css_setup_spctrl_config()