/drivers/gpu/drm/sun4i/ |
D | sun4i_tcon.c | 408 start_delay = (mode->crtc_vtotal - mode->crtc_vdisplay - 10 - 1); in sun4i_tcon0_mode_set_cpu() 468 bp = mode->crtc_vtotal - mode->crtc_vsync_start; in sun4i_tcon0_mode_set_lvds() 470 mode->crtc_vtotal, bp); in sun4i_tcon0_mode_set_lvds() 474 SUN4I_TCON0_BASIC2_V_TOTAL(mode->crtc_vtotal * 2) | in sun4i_tcon0_mode_set_lvds() 545 bp = mode->crtc_vtotal - mode->crtc_vsync_start; in sun4i_tcon0_mode_set_rgb() 547 mode->crtc_vtotal, bp); in sun4i_tcon0_mode_set_rgb() 551 SUN4I_TCON0_BASIC2_V_TOTAL(mode->crtc_vtotal * 2) | in sun4i_tcon0_mode_set_rgb() 641 bp = mode->crtc_vtotal - mode->crtc_vsync_start; in sun4i_tcon1_mode_set() 643 mode->crtc_vtotal, bp); in sun4i_tcon1_mode_set()
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/drivers/gpu/drm/ |
D | drm_modes.c | 828 p->crtc_vtotal = p->vtotal; in drm_mode_set_crtcinfo() 835 p->crtc_vtotal /= 2; in drm_mode_set_crtcinfo() 844 p->crtc_vtotal *= 2; in drm_mode_set_crtcinfo() 853 p->crtc_vtotal *= p->vscan; in drm_mode_set_crtcinfo() 863 p->crtc_vdisplay += p->crtc_vtotal; in drm_mode_set_crtcinfo() 864 p->crtc_vsync_start += p->crtc_vtotal; in drm_mode_set_crtcinfo() 865 p->crtc_vsync_end += p->crtc_vtotal; in drm_mode_set_crtcinfo() 866 p->crtc_vtotal += p->crtc_vtotal; in drm_mode_set_crtcinfo() 872 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); in drm_mode_set_crtcinfo()
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D | drm_vblank.c | 619 int frame_size = mode->crtc_htotal * mode->crtc_vtotal; in drm_calc_timestamping_constants() 646 mode->crtc_vtotal, mode->crtc_vdisplay); in drm_calc_timestamping_constants()
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/drivers/gpu/drm/udl/ |
D | udl_modeset.c | 162 yds = mode->crtc_vtotal - mode->crtc_vsync_start; in udl_set_vid_cmds() 183 yec = mode->crtc_vtotal; in udl_set_vid_cmds()
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/drivers/gpu/drm/rcar-du/ |
D | rcar_du_crtc.c | 315 rcar_du_crtc_write(rcrtc, VDSR, mode->crtc_vtotal - in rcar_du_crtc_set_display_timing() 317 rcar_du_crtc_write(rcrtc, VDER, mode->crtc_vtotal - in rcar_du_crtc_set_display_timing() 320 rcar_du_crtc_write(rcrtc, VSPR, mode->crtc_vtotal - in rcar_du_crtc_set_display_timing() 323 rcar_du_crtc_write(rcrtc, VCR, mode->crtc_vtotal - 1); in rcar_du_crtc_set_display_timing()
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/drivers/gpu/drm/mxsfb/ |
D | mxsfb_kms.c | 296 writel(m->crtc_vtotal, mxsfb->base + LCDC_VDCTRL1); in mxsfb_crtc_mode_set_nofb() 305 SET_VERT_WAIT_CNT(m->crtc_vtotal - m->crtc_vsync_start), in mxsfb_crtc_mode_set_nofb()
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/drivers/gpu/drm/arc/ |
D | arcpgu_crtc.c | 83 ENCODE_PGU_XY(m->crtc_htotal, m->crtc_vtotal)); in arc_pgu_crtc_mode_set_nofb()
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/drivers/gpu/drm/gma500/ |
D | oaktrail_crtc.c | 445 ((adjusted_mode->crtc_vtotal - 1) << 16), i); in oaktrail_crtc_mode_set() 464 ((adjusted_mode->crtc_vtotal - 1) << 16), i); in oaktrail_crtc_mode_set()
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D | oaktrail_hdmi.c | 330 REG_WRITE(vtot_reg, (adjusted_mode->crtc_vdisplay - 1) | ((adjusted_mode->crtc_vtotal - 1) << 16)); in oaktrail_crtc_hdmi_mode_set() 338 …REG_WRITE(PCH_VTOTAL_B, (adjusted_mode->crtc_vdisplay - 1) | ((adjusted_mode->crtc_vtotal - 1) << … in oaktrail_crtc_hdmi_mode_set()
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D | mdfld_intel_display.c | 776 ((adjusted_mode->crtc_vtotal - 1) << 16)); in mdfld_crtc_mode_set() 793 ((adjusted_mode->crtc_vtotal - 1) << 16)); in mdfld_crtc_mode_set()
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D | psb_intel_display.c | 268 ((adjusted_mode->crtc_vtotal - 1) << 16)); in psb_intel_crtc_mode_set()
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/drivers/gpu/drm/i915/display/ |
D | vlv_dsi.c | 1120 adjusted_mode->crtc_vtotal = in bxt_dsi_get_pipe_config() 1162 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vtotal; in bxt_dsi_get_pipe_config() 1301 vbp = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_end; in set_dsi_timings() 1324 adjusted_mode->crtc_vtotal); in set_dsi_timings() 1472 …txbyteclkhs(adjusted_mode->crtc_vtotal * adjusted_mode->crtc_htotal, bpp, intel_dsi->lane_count, i… in intel_dsi_prepare()
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D | dvo_ns2501.c | 589 adjusted_mode->crtc_vtotal); in ns2501_mode_set()
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/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_encoders.c | 199 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank; in amdgpu_panel_mode_fixup()
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/drivers/gpu/drm/arm/ |
D | hdlcd_crtc.c | 136 vm.vback_porch = m->crtc_vtotal - m->crtc_vsync_end; in hdlcd_crtc_mode_set_nofb()
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/drivers/gpu/drm/bridge/cadence/ |
D | cdns-mhdp8546-core.c | 1813 msa_v0 = mode->crtc_vtotal - mode->crtc_vsync_start; in cdns_mhdp_configure_video() 1815 CDNS_DP_MSAV0_V_TOTAL(mode->crtc_vtotal) | in cdns_mhdp_configure_video() 1827 mode->crtc_vtotal % 2 == 0) in cdns_mhdp_configure_video() 1846 dp_vertical_1 = CDNS_DP_V1_VTOTAL(mode->crtc_vtotal); in cdns_mhdp_configure_video() 1848 mode->crtc_vtotal % 2 == 0) in cdns_mhdp_configure_video()
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/drivers/gpu/drm/vc4/ |
D | vc4_hdmi.c | 525 VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end + in vc4_hdmi_set_timings() 529 VC4_SET_FIELD(mode->crtc_vtotal - in vc4_hdmi_set_timings() 570 VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end + in vc5_hdmi_set_timings() 574 VC4_SET_FIELD(mode->crtc_vtotal - in vc5_hdmi_set_timings()
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D | vc4_crtc.c | 349 VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end + in vc4_crtc_config_pv() 361 VC4_SET_FIELD(mode->crtc_vtotal - in vc4_crtc_config_pv()
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/drivers/gpu/drm/radeon/ |
D | radeon_legacy_crtc.c | 98 fp_crtc_v_total_disp = (((mode->crtc_vtotal - 1) & 0xffff) in radeon_legacy_rmx_mode_set() 637 crtc_v_total_disp = (((mode->crtc_vtotal - 1) & 0xffff) in radeon_set_crtc_timing()
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D | radeon_encoders.c | 364 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank; in radeon_panel_mode_fixup()
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/drivers/gpu/drm/armada/ |
D | armada_crtc.c | 344 tm = adj->crtc_vtotal - adj->crtc_vsync_end; in armada_drm_crtc_mode_set_nofb() 359 dcrtc->v[1].spu_v_h_total = adj->crtc_vtotal << 16 | in armada_drm_crtc_mode_set_nofb()
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/drivers/gpu/drm/atmel-hlcdc/ |
D | atmel_hlcdc_crtc.c | 83 vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end; in atmel_hlcdc_crtc_mode_set_nofb()
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/drivers/gpu/drm/ast/ |
D | ast_mode.c | 192 adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt; in ast_get_vbios_mode_info() 356 temp = (mode->crtc_vtotal) - 2; in ast_set_crtc_reg()
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/drivers/gpu/drm/msm/disp/mdp5/ |
D | mdp5_crtc.c | 438 vbp = mode->crtc_vtotal - mode->crtc_vsync_end; in mdp5_crtc_get_scanout_position() 451 vfp_end = mode->crtc_vtotal; in mdp5_crtc_get_scanout_position()
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/drivers/gpu/drm/nouveau/dispnv04/ |
D | crtc.c | 254 int vertTotal = mode->crtc_vtotal - 2; in nv_crtc_mode_set_vga() 256 int vertBlankEnd = mode->crtc_vtotal - 1; in nv_crtc_mode_set_vga()
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