Searched refs:ddc_clk_regs (Results 1 – 6 of 6) sorted by relevance
/drivers/gpu/drm/amd/display/dc/gpio/dce110/ |
D | hw_factory_dce110.c | 97 static const struct ddc_registers ddc_clk_regs[] = { variable 98 ddc_clk_regs(1), 99 ddc_clk_regs(2), 100 ddc_clk_regs(3), 101 ddc_clk_regs(4), 102 ddc_clk_regs(5), 103 ddc_clk_regs(6), 128 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 129 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
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/drivers/gpu/drm/amd/display/dc/gpio/dce80/ |
D | hw_factory_dce80.c | 97 static const struct ddc_registers ddc_clk_regs[] = { variable 98 ddc_clk_regs(1), 99 ddc_clk_regs(2), 100 ddc_clk_regs(3), 101 ddc_clk_regs(4), 102 ddc_clk_regs(5), 103 ddc_clk_regs(6), 128 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 129 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
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/drivers/gpu/drm/amd/display/dc/gpio/dce60/ |
D | hw_factory_dce60.c | 97 static const struct ddc_registers ddc_clk_regs[] = { variable 98 ddc_clk_regs(1), 99 ddc_clk_regs(2), 100 ddc_clk_regs(3), 101 ddc_clk_regs(4), 102 ddc_clk_regs(5), 103 ddc_clk_regs(6), 128 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 129 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
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/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
D | hw_factory_dce120.c | 110 static const struct ddc_registers ddc_clk_regs[] = { variable 111 ddc_clk_regs(1), 112 ddc_clk_regs(2), 113 ddc_clk_regs(3), 114 ddc_clk_regs(4), 115 ddc_clk_regs(5), 116 ddc_clk_regs(6), 141 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 142 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
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/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
D | hw_factory_dcn10.c | 106 static const struct ddc_registers ddc_clk_regs[] = { variable 107 ddc_clk_regs(1), 108 ddc_clk_regs(2), 109 ddc_clk_regs(3), 110 ddc_clk_regs(4), 111 ddc_clk_regs(5), 112 ddc_clk_regs(6), 173 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 174 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
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/drivers/gpu/drm/amd/display/dc/gpio/ |
D | ddc_regs.h | 149 #define ddc_clk_regs(id) \ macro
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