Home
last modified time | relevance | path

Searched refs:dma_readl (Results 1 – 9 of 9) sorted by relevance

/drivers/dma/
Dpch_dma.c132 #define dma_readl(pd, name) \ macro
188 val = dma_readl(pd, CTL2); in pdc_enable_irq()
210 val = dma_readl(pd, CTL0); in pdc_set_dir()
228 val = dma_readl(pd, CTL3); in pdc_set_dir()
261 val = dma_readl(pd, CTL0); in pdc_set_mode()
272 val = dma_readl(pd, CTL3); in pdc_set_mode()
288 val = dma_readl(pd, STS0); in pdc_get_status0()
298 val = dma_readl(pd, STS2); in pdc_get_status2()
702 sts0 = dma_readl(pd, STS0); in pd_irq()
703 sts2 = dma_readl(pd, STS2); in pd_irq()
[all …]
Dat_hdmac_regs.h337 #define dma_readl(atdma, name) \ macro
363 dma_readl(atdma, EBCIMR), in vdbg_dump_regs()
364 dma_readl(atdma, CHSR)); in vdbg_dump_regs()
420 return !!(dma_readl(atdma, CHSR) & atchan->mask); in atc_chan_is_enabled()
Didma64.c49 } while (dma_readl(idma64, CFG) & IDMA64_CFG_DMA_EN && --count); in idma64_off()
165 u32 status = dma_readl(idma64, STATUS_INT); in idma64_irq()
176 status_xfer = dma_readl(idma64, RAW(XFER)); in idma64_irq()
177 status_err = dma_readl(idma64, RAW(ERROR)); in idma64_irq()
Dowl-dma.c284 static u32 dma_readl(struct owl_dma *od, u32 reg) in dma_readl() function
494 val = dma_readl(od, OWL_DMA_IDLE_STAT); in owl_dma_pchan_busy()
511 irq_pd = dma_readl(od, OWL_DMA_IRQ_PD0); in owl_dma_terminate_pchan()
602 pending = dma_readl(od, OWL_DMA_IRQ_PD0); in owl_dma_interrupt()
620 dma_readl(od, OWL_DMA_IRQ_PD0); in owl_dma_interrupt()
622 global_irq_pending = dma_readl(od, OWL_DMA_IRQ_PD0); in owl_dma_interrupt()
Dat_hdmac.c594 imr = dma_readl(atdma, EBCIMR); in at_dma_interrupt()
595 status = dma_readl(atdma, EBCISR); in at_dma_interrupt()
1400 while (dma_readl(atdma, CHSR) & atchan->mask) in atc_terminate_all()
1738 while (dma_readl(atdma, CHSR) & atdma->all_chan_mask) in at_dma_off()
1834 while (dma_readl(atdma, EBCISR)) in at_dma_probe()
2044 atdma->save_imr = dma_readl(atdma, EBCIMR); in at_dma_suspend_noirq()
2081 while (dma_readl(atdma, EBCISR)) in at_dma_resume_noirq()
Didma64.h208 #define dma_readl(idma64, reg) \ macro
Dtxx9dmac.c122 #define dma_readl(ddev, name) \ macro
651 mcr = dma_readl(ddev, MCR); in txx9dmac_tasklet()
676 dma_readl(ddev, MCR)); in txx9dmac_interrupt()
/drivers/dma/dw/
Dcore.c144 while (dma_readl(dw, CH_EN) & dwc->mask) in dwc_chan_disable()
181 if (dma_readl(dw, CH_EN) & dwc->mask) { in dwc_dostart()
269 if (dma_readl(dw, CH_EN) & dwc->mask) { in dwc_complete_all()
310 status_xfer = dma_readl(dw, RAW.XFER); in dwc_scan_descriptors()
474 status_xfer = dma_readl(dw, RAW.XFER); in dw_dma_tasklet()
475 status_err = dma_readl(dw, RAW.ERROR); in dw_dma_tasklet()
503 status = dma_readl(dw, STATUS_INT); in dw_dma_interrupt()
518 status = dma_readl(dw, STATUS_INT); in dw_dma_interrupt()
969 while (dma_readl(dw, CFG) & DW_CFG_DMA_EN) in do_dw_dma_off()
986 if (dma_readl(dw, CH_EN) & dwc->mask) { in dwc_alloc_chan_resources()
[all …]
Dregs.h349 #define dma_readl(dw, name) \ macro