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Searched refs:dma_writel (Results 1 – 9 of 9) sorted by relevance

/drivers/dma/
Dpch_dma.c134 #define dma_writel(pd, name, val) \ macro
195 dma_writel(pd, CTL2, val); in pdc_enable_irq()
225 dma_writel(pd, CTL0, val); in pdc_set_dir()
242 dma_writel(pd, CTL3, val); in pdc_set_dir()
265 dma_writel(pd, CTL0, val); in pdc_set_mode()
276 dma_writel(pd, CTL3, val); in pdc_set_mode()
731 dma_writel(pd, STS0, sts0); in pd_irq()
733 dma_writel(pd, STS2, sts2); in pd_irq()
767 dma_writel(pd, CTL0, pd->regs.dma_ctl0); in pch_dma_restore_regs()
768 dma_writel(pd, CTL1, pd->regs.dma_ctl1); in pch_dma_restore_regs()
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Didma64.h147 dma_writel(idma64, reg, ((mask) << 8) | (mask))
149 dma_writel(idma64, reg, ((mask) << 8) | 0)
210 #define dma_writel(idma64, reg, value) \ macro
Dat_hdmac_regs.h339 #define dma_writel(atdma, name, val) \ macro
396 dma_writel(atdma, EBCIER, ebci); in atc_setup_irq()
398 dma_writel(atdma, EBCIDR, ebci); in atc_setup_irq()
Dat_hdmac.c242 dma_writel(atdma, CHER, atchan->mask); in atc_dostart()
610 dma_writel(atdma, CHDR, in at_dma_interrupt()
1349 dma_writel(atdma, CHER, AT_DMA_SUSP(chan_id)); in atc_pause()
1371 dma_writel(atdma, CHDR, AT_DMA_RES(chan_id)); in atc_resume()
1397 dma_writel(atdma, CHDR, AT_DMA_RES(chan_id) | atchan->mask); in atc_terminate_all()
1732 dma_writel(atdma, EN, 0); in at_dma_off()
1735 dma_writel(atdma, EBCIDR, -1L); in at_dma_off()
1896 dma_writel(atdma, EN, AT_DMA_ENABLE); in at_dma_probe()
2063 dma_writel(atdma, CHER, atchan->mask); in atc_resume_cyclic()
2078 dma_writel(atdma, EN, AT_DMA_ENABLE); in at_dma_resume_noirq()
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Didma64.c39 dma_writel(idma64, CFG, 0); in idma64_off()
54 dma_writel(idma64, CFG, IDMA64_CFG_DMA_EN); in idma64_on()
146 dma_writel(idma64, CLEAR(ERROR), idma64c->mask); in idma64_chan_irq()
149 dma_writel(idma64, CLEAR(XFER), idma64c->mask); in idma64_chan_irq()
Dowl-dma.c279 static void dma_writel(struct owl_dma *od, u32 reg, u32 data) in dma_writel() function
516 dma_writel(od, OWL_DMA_IRQ_PD0, (1 << pchan->id)); in owl_dma_terminate_pchan()
611 dma_writel(od, OWL_DMA_IRQ_PD0, pending); in owl_dma_interrupt()
1240 dma_writel(od, OWL_DMA_IRQ_EN0, 0x0); in owl_dma_remove()
Dtxx9dmac.c125 #define dma_writel(ddev, name, val) \ macro
1077 dma_writel(ddev, MCR, 0); in txx9dmac_off()
1212 dma_writel(ddev, MCR, mcr); in txx9dmac_probe()
1254 dma_writel(ddev, MCR, mcr); in txx9dmac_resume_noirq()
/drivers/dma/dw/
Dregs.h351 #define dma_writel(dw, name, val) \ macro
360 dma_writel(dw, reg, ((mask) << 8) | (mask))
362 dma_writel(dw, reg, ((mask) << 8) | 0)
Dcore.c314 dma_writel(dw, CLEAR.XFER, dwc->mask); in dwc_scan_descriptors()
443 dma_writel(dw, CLEAR.ERROR, dwc->mask); in dwc_handle_error()
961 dma_writel(dw, CFG, 0); in do_dw_dma_off()
975 dma_writel(dw, CFG, DW_CFG_DMA_EN); in do_dw_dma_on()
1218 dma_writel(dw, CLEAR.XFER, dw->all_chan_mask); in do_dma_probe()
1219 dma_writel(dw, CLEAR.BLOCK, dw->all_chan_mask); in do_dma_probe()
1220 dma_writel(dw, CLEAR.SRC_TRAN, dw->all_chan_mask); in do_dma_probe()
1221 dma_writel(dw, CLEAR.DST_TRAN, dw->all_chan_mask); in do_dma_probe()
1222 dma_writel(dw, CLEAR.ERROR, dw->all_chan_mask); in do_dma_probe()