| /drivers/gpu/drm/amd/display/dmub/src/ |
| D | dmub_srv.c | 132 static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic) in dmub_srv_hw_setup() argument
134 struct dmub_srv_hw_funcs *funcs = &dmub->hw_funcs; in dmub_srv_hw_setup()
142 dmub->regs = &dmub_srv_dcn20_regs; in dmub_srv_hw_setup()
158 dmub->regs = &dmub_srv_dcn21_regs; in dmub_srv_hw_setup()
165 dmub->regs = &dmub_srv_dcn30_regs; in dmub_srv_hw_setup()
181 enum dmub_status dmub_srv_create(struct dmub_srv *dmub, in dmub_srv_create() argument
186 dmub_memset(dmub, 0, sizeof(*dmub)); in dmub_srv_create()
188 dmub->funcs = params->funcs; in dmub_srv_create()
189 dmub->user_ctx = params->user_ctx; in dmub_srv_create()
190 dmub->asic = params->asic; in dmub_srv_create()
[all …]
|
| D | dmub_dcn20.c | 36 #define CTX dmub
37 #define REGS dmub->regs
57 static void dmub_dcn20_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn20_get_fb_base_offset() argument
63 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn20_get_fb_base_offset()
64 *fb_base = dmub->fb_base; in dmub_dcn20_get_fb_base_offset()
65 *fb_offset = dmub->fb_offset; in dmub_dcn20_get_fb_base_offset()
84 void dmub_dcn20_reset(struct dmub_srv *dmub) in dmub_dcn20_reset() argument
97 dmub->hw_funcs.set_gpint(dmub, cmd); in dmub_dcn20_reset()
109 if (dmub->hw_funcs.is_gpint_acked(dmub, cmd)) in dmub_dcn20_reset()
114 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn20_reset()
[all …]
|
| D | dmub_dcn20.h | 159 void dmub_dcn20_init(struct dmub_srv *dmub);
161 void dmub_dcn20_reset(struct dmub_srv *dmub);
163 void dmub_dcn20_reset_release(struct dmub_srv *dmub);
165 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub,
169 void dmub_dcn20_setup_windows(struct dmub_srv *dmub,
176 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub,
179 uint32_t dmub_dcn20_get_inbox1_rptr(struct dmub_srv *dmub);
181 void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
183 bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub);
185 bool dmub_dcn20_is_supported(struct dmub_srv *dmub);
[all …]
|
| D | dmub_dcn30.c | 35 #define CTX dmub
36 #define REGS dmub->regs
56 static void dmub_dcn30_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn30_get_fb_base_offset() argument
62 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn30_get_fb_base_offset()
63 *fb_base = dmub->fb_base; in dmub_dcn30_get_fb_base_offset()
64 *fb_offset = dmub->fb_offset; in dmub_dcn30_get_fb_base_offset()
83 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub, in dmub_dcn30_backdoor_load() argument
90 dmub_dcn30_get_fb_base_offset(dmub, &fb_base, &fb_offset); in dmub_dcn30_backdoor_load()
118 void dmub_dcn30_setup_windows(struct dmub_srv *dmub, in dmub_dcn30_setup_windows() argument
157 if (dmub->fw_version > DMUB_FW_VERSION(1, 0, 10)) { in dmub_dcn30_setup_windows()
[all …]
|
| D | dmub_dcn21.c | 35 #define CTX dmub
36 #define REGS dmub->regs
56 bool dmub_dcn21_is_auto_load_done(struct dmub_srv *dmub) in dmub_dcn21_is_auto_load_done() argument
61 bool dmub_dcn21_is_phy_init(struct dmub_srv *dmub) in dmub_dcn21_is_phy_init() argument
|
| D | dmub_dcn30.h | 37 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub,
41 void dmub_dcn30_setup_windows(struct dmub_srv *dmub,
48 bool dmub_dcn30_is_auto_load_done(struct dmub_srv *dmub);
|
| D | dmub_dcn21.h | 37 bool dmub_dcn21_is_auto_load_done(struct dmub_srv *dmub);
39 bool dmub_dcn21_is_phy_init(struct dmub_srv *dmub);
|
| D | Makefile | 28 AMD_DAL_DMUB = $(addprefix $(AMDDALPATH)/dmub/src/,$(DMUB))
|
| /drivers/gpu/drm/amd/display/dmub/ |
| D | dmub_srv.h | 241 void (*init)(struct dmub_srv *dmub);
243 void (*reset)(struct dmub_srv *dmub);
245 void (*reset_release)(struct dmub_srv *dmub);
247 void (*backdoor_load)(struct dmub_srv *dmub,
251 void (*setup_windows)(struct dmub_srv *dmub,
258 void (*setup_mailbox)(struct dmub_srv *dmub,
261 uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);
263 void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
265 uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);
267 void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
[all …]
|
| /drivers/gpu/drm/amd/display/dc/ |
| D | dc_dmub_srv.c | 31 struct dmub_srv *dmub) in dc_dmub_srv_construct() argument
33 dc_srv->dmub = dmub; in dc_dmub_srv_construct()
37 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub) in dc_dmub_srv_create() argument
47 dc_dmub_srv_construct(dc_srv, dc, dmub); in dc_dmub_srv_create()
63 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_cmd_queue() local
67 status = dmub_srv_cmd_queue(dmub, cmd); in dc_dmub_srv_cmd_queue()
79 status = dmub_srv_cmd_queue(dmub, cmd); in dc_dmub_srv_cmd_queue()
89 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_cmd_execute() local
93 status = dmub_srv_cmd_execute(dmub); in dc_dmub_srv_cmd_execute()
100 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_wait_idle() local
[all …]
|
| D | dc_dmub_srv.h | 43 struct dmub_srv *dmub; member
|
| D | dm_services.h | 145 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub);
|
| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dmub_psr.c | 76 static void dmub_psr_get_state(struct dmub_psr *dmub, uint32_t *psr_state) in dmub_psr_get_state() argument
78 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; in dmub_psr_get_state()
91 static bool dmub_psr_set_version(struct dmub_psr *dmub, struct dc_stream_state *stream) in dmub_psr_set_version() argument
94 struct dc_context *dc = dmub->ctx; in dmub_psr_set_version()
122 static void dmub_psr_enable(struct dmub_psr *dmub, bool enable, bool wait) in dmub_psr_enable() argument
125 struct dc_context *dc = dmub->ctx; in dmub_psr_enable()
147 dmub_psr_get_state(dmub, &psr_state); in dmub_psr_enable()
169 static void dmub_psr_set_level(struct dmub_psr *dmub, uint16_t psr_level) in dmub_psr_set_level() argument
173 struct dc_context *dc = dmub->ctx; in dmub_psr_set_level()
175 dmub_psr_get_state(dmub, &psr_state); in dmub_psr_set_level()
[all …]
|
| D | dmub_psr.h | 38 …bool (*psr_copy_settings)(struct dmub_psr *dmub, struct dc_link *link, struct psr_context *psr_con…
39 void (*psr_enable)(struct dmub_psr *dmub, bool enable, bool wait);
40 void (*psr_get_state)(struct dmub_psr *dmub, uint32_t *psr_state);
41 void (*psr_set_level)(struct dmub_psr *dmub, uint16_t psr_level);
45 void dmub_psr_destroy(struct dmub_psr **dmub);
|
| D | dmub_abm.c | 158 dmub_flush_buffer_mem(&dc->dmub_srv->dmub->scratch_mem_fb); in dmub_abm_init_config()
161 memcpy(dc->dmub_srv->dmub->scratch_mem_fb.cpu_addr, (void *)src, bytes); in dmub_abm_init_config()
166 …cmd.abm_init_config.abm_init_config_data.src.quad_part = dc->dmub_srv->dmub->scratch_mem_fb.gpu_ad… in dmub_abm_init_config()
|
| /drivers/gpu/drm/amd/display/ |
| D | Makefile | 37 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dmub/inc
46 DAL_LIBS = amdgpu_dm dc modules/freesync modules/color modules/info_packet modules/power dmub/src
|
| /drivers/gpu/drm/amd/display/dmub/inc/ |
| D | dmub_cmd.h | 808 void *dmub; member
|