Home
last modified time | relevance | path

Searched refs:e3 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/msm/disp/
Dmdp_format.c63 #define FMT(name, a, r, g, b, e0, e1, e2, e3, alpha, tight, c, cnt, fp, cs, yuv) { \ argument
69 .unpack = { e0, e1, e2, e3 }, \
/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_formats.c33 #define INTERLEAVED_RGB_FMT(fmt, a, r, g, b, e0, e1, e2, e3, uc, alpha, \ argument
39 .element = { (e0), (e1), (e2), (e3) }, \
52 #define INTERLEAVED_RGB_FMT_TILED(fmt, a, r, g, b, e0, e1, e2, e3, uc, \ argument
58 .element = { (e0), (e1), (e2), (e3) }, \
72 #define INTERLEAVED_YUV_FMT(fmt, a, r, g, b, e0, e1, e2, e3, \ argument
78 .element = { (e0), (e1), (e2), (e3)}, \
/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_init.h568 u32 e3; /* 578xx */ member
701 return bnx2x_blocks_parity_data[idx].reg_mask.e3; in bnx2x_parity_reg_mask()
/drivers/tty/vt/
Dcp437.uni117 0x61 U+0061 U+00e3
/drivers/infiniband/hw/hfi1/
Dchip.c245 e3, e3val, \ argument
262 ((u64)(e3val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e3##_SHIFT) | \