1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * K3 SA2UL crypto accelerator driver 4 * 5 * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com 6 * 7 * Authors: Keerthy 8 * Vitaly Andrianov 9 * Tero Kristo 10 */ 11 12 #ifndef _K3_SA2UL_ 13 #define _K3_SA2UL_ 14 15 #include <linux/interrupt.h> 16 #include <linux/skbuff.h> 17 #include <linux/hw_random.h> 18 #include <crypto/aes.h> 19 20 #define SA_ENGINE_ENABLE_CONTROL 0x1000 21 22 struct sa_tfm_ctx; 23 /* 24 * SA_ENGINE_ENABLE_CONTROL register bits 25 */ 26 #define SA_EEC_ENCSS_EN 0x00000001 27 #define SA_EEC_AUTHSS_EN 0x00000002 28 #define SA_EEC_TRNG_EN 0x00000008 29 #define SA_EEC_PKA_EN 0x00000010 30 #define SA_EEC_CTXCACH_EN 0x00000080 31 #define SA_EEC_CPPI_PORT_IN_EN 0x00000200 32 #define SA_EEC_CPPI_PORT_OUT_EN 0x00000800 33 34 /* 35 * Encoding used to identify the typo of crypto operation 36 * performed on the packet when the packet is returned 37 * by SA 38 */ 39 #define SA_REQ_SUBTYPE_ENC 0x0001 40 #define SA_REQ_SUBTYPE_DEC 0x0002 41 #define SA_REQ_SUBTYPE_SHIFT 16 42 #define SA_REQ_SUBTYPE_MASK 0xffff 43 44 /* Number of 32 bit words in EPIB */ 45 #define SA_DMA_NUM_EPIB_WORDS 4 46 47 /* Number of 32 bit words in PS data */ 48 #define SA_DMA_NUM_PS_WORDS 16 49 #define NKEY_SZ 3 50 #define MCI_SZ 27 51 52 /* 53 * Maximum number of simultaeneous security contexts 54 * supported by the driver 55 */ 56 #define SA_MAX_NUM_CTX 512 57 58 /* 59 * Assumption: CTX size is multiple of 32 60 */ 61 #define SA_CTX_SIZE_TO_DMA_SIZE(ctx_sz) \ 62 ((ctx_sz) ? ((ctx_sz) / 32 - 1) : 0) 63 64 #define SA_CTX_ENC_KEY_OFFSET 32 65 #define SA_CTX_ENC_AUX1_OFFSET 64 66 #define SA_CTX_ENC_AUX2_OFFSET 96 67 #define SA_CTX_ENC_AUX3_OFFSET 112 68 #define SA_CTX_ENC_AUX4_OFFSET 128 69 70 /* Next Engine Select code in CP_ACE */ 71 #define SA_ENG_ID_EM1 2 /* Enc/Dec engine with AES/DEC core */ 72 #define SA_ENG_ID_EM2 3 /* Encryption/Decryption enginefor pass 2 */ 73 #define SA_ENG_ID_AM1 4 /* Auth. engine with SHA1/MD5/SHA2 core */ 74 #define SA_ENG_ID_AM2 5 /* Authentication engine for pass 2 */ 75 #define SA_ENG_ID_OUTPORT2 20 /* Egress module 2 */ 76 77 /* 78 * Command Label Definitions 79 */ 80 #define SA_CMDL_OFFSET_NESC 0 /* Next Engine Select Code */ 81 #define SA_CMDL_OFFSET_LABEL_LEN 1 /* Engine Command Label Length */ 82 /* 16-bit Length of Data to be processed */ 83 #define SA_CMDL_OFFSET_DATA_LEN 2 84 #define SA_CMDL_OFFSET_DATA_OFFSET 4 /* Stat Data Offset */ 85 #define SA_CMDL_OFFSET_OPTION_CTRL1 5 /* Option Control Byte 1 */ 86 #define SA_CMDL_OFFSET_OPTION_CTRL2 6 /* Option Control Byte 2 */ 87 #define SA_CMDL_OFFSET_OPTION_CTRL3 7 /* Option Control Byte 3 */ 88 #define SA_CMDL_OFFSET_OPTION_BYTE 8 89 90 #define SA_CMDL_HEADER_SIZE_BYTES 8 91 92 #define SA_CMDL_OPTION_BYTES_MAX_SIZE 72 93 #define SA_CMDL_MAX_SIZE_BYTES (SA_CMDL_HEADER_SIZE_BYTES + \ 94 SA_CMDL_OPTION_BYTES_MAX_SIZE) 95 96 /* SWINFO word-0 flags */ 97 #define SA_SW_INFO_FLAG_EVICT 0x0001 98 #define SA_SW_INFO_FLAG_TEAR 0x0002 99 #define SA_SW_INFO_FLAG_NOPD 0x0004 100 101 /* 102 * This type represents the various packet types to be processed 103 * by the PHP engine in SA. 104 * It is used to identify the corresponding PHP processing function. 105 */ 106 #define SA_CTX_PE_PKT_TYPE_3GPP_AIR 0 /* 3GPP Air Cipher */ 107 #define SA_CTX_PE_PKT_TYPE_SRTP 1 /* SRTP */ 108 #define SA_CTX_PE_PKT_TYPE_IPSEC_AH 2 /* IPSec Authentication Header */ 109 /* IPSec Encapsulating Security Payload */ 110 #define SA_CTX_PE_PKT_TYPE_IPSEC_ESP 3 111 /* Indicates that it is in data mode, It may not be used by PHP */ 112 #define SA_CTX_PE_PKT_TYPE_NONE 4 113 #define SA_CTX_ENC_TYPE1_SZ 64 /* Encryption SC with Key only */ 114 #define SA_CTX_ENC_TYPE2_SZ 96 /* Encryption SC with Key and Aux1 */ 115 116 #define SA_CTX_AUTH_TYPE1_SZ 64 /* Auth SC with Key only */ 117 #define SA_CTX_AUTH_TYPE2_SZ 96 /* Auth SC with Key and Aux1 */ 118 /* Size of security context for PHP engine */ 119 #define SA_CTX_PHP_PE_CTX_SZ 64 120 121 #define SA_CTX_MAX_SZ (64 + SA_CTX_ENC_TYPE2_SZ + SA_CTX_AUTH_TYPE2_SZ) 122 123 /* 124 * Encoding of F/E control in SCCTL 125 * Bit 0-1: Fetch PHP Bytes 126 * Bit 2-3: Fetch Encryption/Air Ciphering Bytes 127 * Bit 4-5: Fetch Authentication Bytes or Encr pass 2 128 * Bit 6-7: Evict PHP Bytes 129 * 130 * where 00 = 0 bytes 131 * 01 = 64 bytes 132 * 10 = 96 bytes 133 * 11 = 128 bytes 134 */ 135 #define SA_CTX_DMA_SIZE_0 0 136 #define SA_CTX_DMA_SIZE_64 1 137 #define SA_CTX_DMA_SIZE_96 2 138 #define SA_CTX_DMA_SIZE_128 3 139 140 /* 141 * Byte offset of the owner word in SCCTL 142 * in the security context 143 */ 144 #define SA_CTX_SCCTL_OWNER_OFFSET 0 145 146 #define SA_CTX_ENC_KEY_OFFSET 32 147 #define SA_CTX_ENC_AUX1_OFFSET 64 148 #define SA_CTX_ENC_AUX2_OFFSET 96 149 #define SA_CTX_ENC_AUX3_OFFSET 112 150 #define SA_CTX_ENC_AUX4_OFFSET 128 151 152 #define SA_SCCTL_FE_AUTH_ENC 0x65 153 #define SA_SCCTL_FE_ENC 0x8D 154 155 #define SA_ALIGN_MASK (sizeof(u32) - 1) 156 #define SA_ALIGNED __aligned(32) 157 158 #define SA_AUTH_SW_CTRL_MD5 1 159 #define SA_AUTH_SW_CTRL_SHA1 2 160 #define SA_AUTH_SW_CTRL_SHA224 3 161 #define SA_AUTH_SW_CTRL_SHA256 4 162 #define SA_AUTH_SW_CTRL_SHA384 5 163 #define SA_AUTH_SW_CTRL_SHA512 6 164 165 /* SA2UL can only handle maximum data size of 64KB */ 166 #define SA_MAX_DATA_SZ U16_MAX 167 168 /* 169 * SA2UL can provide unpredictable results with packet sizes that fall 170 * the following range, so avoid using it. 171 */ 172 #define SA_UNSAFE_DATA_SZ_MIN 240 173 #define SA_UNSAFE_DATA_SZ_MAX 256 174 175 /** 176 * struct sa_crypto_data - Crypto driver instance data 177 * @base: Base address of the register space 178 * @pdev: Platform device pointer 179 * @sc_pool: security context pool 180 * @dev: Device pointer 181 * @scid_lock: secure context ID lock 182 * @sc_id_start: starting index for SC ID 183 * @sc_id_end: Ending index for SC ID 184 * @sc_id: Security Context ID 185 * @ctx_bm: Bitmap to keep track of Security context ID's 186 * @ctx: SA tfm context pointer 187 * @dma_rx1: Pointer to DMA rx channel for sizes < 256 Bytes 188 * @dma_rx2: Pointer to DMA rx channel for sizes > 256 Bytes 189 * @dma_tx: Pointer to DMA TX channel 190 */ 191 struct sa_crypto_data { 192 void __iomem *base; 193 struct platform_device *pdev; 194 struct dma_pool *sc_pool; 195 struct device *dev; 196 spinlock_t scid_lock; /* lock for SC-ID allocation */ 197 /* Security context data */ 198 u16 sc_id_start; 199 u16 sc_id_end; 200 u16 sc_id; 201 unsigned long ctx_bm[DIV_ROUND_UP(SA_MAX_NUM_CTX, 202 BITS_PER_LONG)]; 203 struct sa_tfm_ctx *ctx; 204 struct dma_chan *dma_rx1; 205 struct dma_chan *dma_rx2; 206 struct dma_chan *dma_tx; 207 }; 208 209 /** 210 * struct sa_cmdl_param_info: Command label parameters info 211 * @index: Index of the parameter in the command label format 212 * @offset: the offset of the parameter 213 * @size: Size of the parameter 214 */ 215 struct sa_cmdl_param_info { 216 u16 index; 217 u16 offset; 218 u16 size; 219 }; 220 221 /* Maximum length of Auxiliary data in 32bit words */ 222 #define SA_MAX_AUX_DATA_WORDS 8 223 224 /** 225 * struct sa_cmdl_upd_info: Command label updation info 226 * @flags: flags in command label 227 * @submode: Encryption submodes 228 * @enc_size: Size of first pass encryption size 229 * @enc_size2: Size of second pass encryption size 230 * @enc_offset: Encryption payload offset in the packet 231 * @enc_iv: Encryption initialization vector for pass2 232 * @enc_iv2: Encryption initialization vector for pass2 233 * @aad: Associated data 234 * @payload: Payload info 235 * @auth_size: Authentication size for pass 1 236 * @auth_size2: Authentication size for pass 2 237 * @auth_offset: Authentication payload offset 238 * @auth_iv: Authentication initialization vector 239 * @aux_key_info: Authentication aux key information 240 * @aux_key: Aux key for authentication 241 */ 242 struct sa_cmdl_upd_info { 243 u16 flags; 244 u16 submode; 245 struct sa_cmdl_param_info enc_size; 246 struct sa_cmdl_param_info enc_size2; 247 struct sa_cmdl_param_info enc_offset; 248 struct sa_cmdl_param_info enc_iv; 249 struct sa_cmdl_param_info enc_iv2; 250 struct sa_cmdl_param_info aad; 251 struct sa_cmdl_param_info payload; 252 struct sa_cmdl_param_info auth_size; 253 struct sa_cmdl_param_info auth_size2; 254 struct sa_cmdl_param_info auth_offset; 255 struct sa_cmdl_param_info auth_iv; 256 struct sa_cmdl_param_info aux_key_info; 257 u32 aux_key[SA_MAX_AUX_DATA_WORDS]; 258 }; 259 260 /* 261 * Number of 32bit words appended after the command label 262 * in PSDATA to identify the crypto request context. 263 * word-0: Request type 264 * word-1: pointer to request 265 */ 266 #define SA_PSDATA_CTX_WORDS 4 267 268 /* Maximum size of Command label in 32 words */ 269 #define SA_MAX_CMDL_WORDS (SA_DMA_NUM_PS_WORDS - SA_PSDATA_CTX_WORDS) 270 271 /** 272 * struct sa_ctx_info: SA context information 273 * @sc: Pointer to security context 274 * @sc_phys: Security context physical address that is passed on to SA2UL 275 * @sc_id: Security context ID 276 * @cmdl_size: Command label size 277 * @cmdl: Command label for a particular iteration 278 * @cmdl_upd_info: structure holding command label updation info 279 * @epib: Extended protocol information block words 280 */ 281 struct sa_ctx_info { 282 u8 *sc; 283 dma_addr_t sc_phys; 284 u16 sc_id; 285 u16 cmdl_size; 286 u32 cmdl[SA_MAX_CMDL_WORDS]; 287 struct sa_cmdl_upd_info cmdl_upd_info; 288 /* Store Auxiliary data such as K2/K3 subkeys in AES-XCBC */ 289 u32 epib[SA_DMA_NUM_EPIB_WORDS]; 290 }; 291 292 /** 293 * struct sa_tfm_ctx: TFM context structure 294 * @dev_data: struct sa_crypto_data pointer 295 * @enc: struct sa_ctx_info for encryption 296 * @dec: struct sa_ctx_info for decryption 297 * @keylen: encrption/decryption keylength 298 * @iv_idx: Initialization vector index 299 * @key: encryption key 300 * @fallback: SW fallback algorithm 301 */ 302 struct sa_tfm_ctx { 303 struct sa_crypto_data *dev_data; 304 struct sa_ctx_info enc; 305 struct sa_ctx_info dec; 306 struct sa_ctx_info auth; 307 int keylen; 308 int iv_idx; 309 u32 key[AES_KEYSIZE_256 / sizeof(u32)]; 310 u8 authkey[SHA512_BLOCK_SIZE]; 311 struct crypto_shash *shash; 312 /* for fallback */ 313 union { 314 struct crypto_sync_skcipher *skcipher; 315 struct crypto_ahash *ahash; 316 struct crypto_aead *aead; 317 } fallback; 318 }; 319 320 /** 321 * struct sa_sha_req_ctx: Structure used for sha request 322 * @dev_data: struct sa_crypto_data pointer 323 * @cmdl: Complete command label with psdata and epib included 324 * @fallback_req: SW fallback request container 325 */ 326 struct sa_sha_req_ctx { 327 struct sa_crypto_data *dev_data; 328 u32 cmdl[SA_MAX_CMDL_WORDS + SA_PSDATA_CTX_WORDS]; 329 struct ahash_request fallback_req; 330 }; 331 332 enum sa_submode { 333 SA_MODE_GEN = 0, 334 SA_MODE_CCM, 335 SA_MODE_GCM, 336 SA_MODE_GMAC 337 }; 338 339 /* Encryption algorithms */ 340 enum sa_ealg_id { 341 SA_EALG_ID_NONE = 0, /* No encryption */ 342 SA_EALG_ID_NULL, /* NULL encryption */ 343 SA_EALG_ID_AES_CTR, /* AES Counter mode */ 344 SA_EALG_ID_AES_F8, /* AES F8 mode */ 345 SA_EALG_ID_AES_CBC, /* AES CBC mode */ 346 SA_EALG_ID_DES_CBC, /* DES CBC mode */ 347 SA_EALG_ID_3DES_CBC, /* 3DES CBC mode */ 348 SA_EALG_ID_CCM, /* Counter with CBC-MAC mode */ 349 SA_EALG_ID_GCM, /* Galois Counter mode */ 350 SA_EALG_ID_AES_ECB, 351 SA_EALG_ID_LAST 352 }; 353 354 /* Authentication algorithms */ 355 enum sa_aalg_id { 356 SA_AALG_ID_NONE = 0, /* No Authentication */ 357 SA_AALG_ID_NULL = SA_EALG_ID_LAST, /* NULL Authentication */ 358 SA_AALG_ID_MD5, /* MD5 mode */ 359 SA_AALG_ID_SHA1, /* SHA1 mode */ 360 SA_AALG_ID_SHA2_224, /* 224-bit SHA2 mode */ 361 SA_AALG_ID_SHA2_256, /* 256-bit SHA2 mode */ 362 SA_AALG_ID_SHA2_512, /* 512-bit SHA2 mode */ 363 SA_AALG_ID_HMAC_MD5, /* HMAC with MD5 mode */ 364 SA_AALG_ID_HMAC_SHA1, /* HMAC with SHA1 mode */ 365 SA_AALG_ID_HMAC_SHA2_224, /* HMAC with 224-bit SHA2 mode */ 366 SA_AALG_ID_HMAC_SHA2_256, /* HMAC with 256-bit SHA2 mode */ 367 SA_AALG_ID_GMAC, /* Galois Message Auth. Code mode */ 368 SA_AALG_ID_CMAC, /* Cipher-based Mes. Auth. Code mode */ 369 SA_AALG_ID_CBC_MAC, /* Cipher Block Chaining */ 370 SA_AALG_ID_AES_XCBC /* AES Extended Cipher Block Chaining */ 371 }; 372 373 /* 374 * Mode control engine algorithms used to index the 375 * mode control instruction tables 376 */ 377 enum sa_eng_algo_id { 378 SA_ENG_ALGO_ECB = 0, 379 SA_ENG_ALGO_CBC, 380 SA_ENG_ALGO_CFB, 381 SA_ENG_ALGO_OFB, 382 SA_ENG_ALGO_CTR, 383 SA_ENG_ALGO_F8, 384 SA_ENG_ALGO_F8F9, 385 SA_ENG_ALGO_GCM, 386 SA_ENG_ALGO_GMAC, 387 SA_ENG_ALGO_CCM, 388 SA_ENG_ALGO_CMAC, 389 SA_ENG_ALGO_CBCMAC, 390 SA_NUM_ENG_ALGOS 391 }; 392 393 /** 394 * struct sa_eng_info: Security accelerator engine info 395 * @eng_id: Engine ID 396 * @sc_size: security context size 397 */ 398 struct sa_eng_info { 399 u8 eng_id; 400 u16 sc_size; 401 }; 402 403 #endif /* _K3_SA2UL_ */ 404