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Searched refs:hdmi_read (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/msm/hdmi/
Dhdmi_hdcp.c203 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_INT_CTRL); in msm_hdmi_hdcp_irq()
228 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS); in msm_hdmi_hdcp_irq()
288 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS); in msm_reset_hdcp_ddc_failures()
309 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_CTRL_1); in msm_reset_hdcp_ddc_failures()
314 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS); in msm_reset_hdcp_ddc_failures()
325 hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS)); in msm_reset_hdcp_ddc_failures()
327 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); in msm_reset_hdcp_ddc_failures()
333 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); in msm_reset_hdcp_ddc_failures()
338 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); in msm_reset_hdcp_ddc_failures()
346 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); in msm_reset_hdcp_ddc_failures()
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Dhdmi_i2c.c53 ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL); in ddc_clear_irq()
76 ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL); in sw_done()
105 WARN_ON(!(hdmi_read(hdmi, REG_HDMI_CTRL) & HDMI_CTRL_ENABLE)); in msm_hdmi_i2c_xfer()
169 hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS), in msm_hdmi_i2c_xfer()
170 hdmi_read(hdmi, REG_HDMI_DDC_HW_STATUS), in msm_hdmi_i2c_xfer()
171 hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL)); in msm_hdmi_i2c_xfer()
175 ddc_status = hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS); in msm_hdmi_i2c_xfer()
197 hdmi_read(hdmi, REG_HDMI_DDC_DATA); in msm_hdmi_i2c_xfer()
200 ddc_data = hdmi_read(hdmi, REG_HDMI_DDC_DATA); in msm_hdmi_i2c_xfer()
Dhdmi_audio.c104 acr_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_ACR_PKT_CTRL); in msm_hdmi_audio_update()
105 vbi_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_VBI_PKT_CTRL); in msm_hdmi_audio_update()
106 aud_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_AUDIO_PKT_CTRL1); in msm_hdmi_audio_update()
107 infofrm_ctrl = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL0); in msm_hdmi_audio_update()
108 audio_config = hdmi_read(hdmi, REG_HDMI_AUDIO_CFG); in msm_hdmi_audio_update()
Dhdmi_hpd.c18 val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL); in msm_hdmi_phy_reset()
137 hpd_ctrl = hdmi_read(hdmi, REG_HDMI_HPD_CTRL); in msm_hdmi_hpd_enable()
187 hpd_int_status = hdmi_read(hdmi, REG_HDMI_HPD_INT_STATUS); in msm_hdmi_hpd_irq()
188 hpd_int_ctrl = hdmi_read(hdmi, REG_HDMI_HPD_INT_CTRL); in msm_hdmi_hpd_irq()
217 hpd_int_status = hdmi_read(hdmi, REG_HDMI_HPD_INT_STATUS); in detect_reg()
Dhdmi_bridge.c137 val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL1); in msm_hdmi_config_avi_infoframe()
269 hdmi_ctrl = hdmi_read(hdmi, REG_HDMI_CTRL); in msm_hdmi_bridge_get_edid()
Dhdmi.h122 static inline u32 hdmi_read(struct hdmi *hdmi, u32 reg) in hdmi_read() function
/drivers/media/i2c/
Dadv7842.c524 static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg) in hdmi_read() function
540 return hdmi_write(sd, reg, (hdmi_read(sd, reg) & mask) | val); in hdmi_write_and_or()
900 reg->val = hdmi_read(sd, reg->reg & 0xff); in adv7842_g_register()
1175 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80; in set_rgb_quantization_range()
1373 return hdmi_read(sd, 0x05) & 0x80; in is_hdmi()
1564 bt->width = (hdmi_read(sd, 0x07) & 0x0f) * 256 + hdmi_read(sd, 0x08); in adv7842_query_dv_timings()
1565 bt->height = (hdmi_read(sd, 0x09) & 0x0f) * 256 + hdmi_read(sd, 0x0a); in adv7842_query_dv_timings()
1566 freq = ((hdmi_read(sd, 0x51) << 1) + (hdmi_read(sd, 0x52) >> 7)) * 1000000; in adv7842_query_dv_timings()
1567 freq += ((hdmi_read(sd, 0x52) & 0x7f) * 7813); in adv7842_query_dv_timings()
1570 freq = freq * 8 / (((hdmi_read(sd, 0x0b) & 0xc0) >> 6) * 2 + 8); in adv7842_query_dv_timings()
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Dadv7604.c535 static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg) in hdmi_read() function
544 return ((hdmi_read(sd, reg) << 8) | hdmi_read(sd, reg + 1)) & mask; in hdmi_read16()
556 return hdmi_write(sd, reg, (hdmi_read(sd, reg) & ~mask) | val); in hdmi_write_clr_set()
1099 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80; in set_rgb_quantization_range()
1281 return hdmi_read(sd, 0x05) & 0x80; in is_hdmi()
1440 polarity = hdmi_read(sd, 0x05); in read_stdi()
1508 a = hdmi_read(sd, 0x06); in adv7604_read_hdmi_pixelclock()
1509 b = hdmi_read(sd, 0x3b); in adv7604_read_hdmi_pixelclock()
1520 a = hdmi_read(sd, 0x51); in adv7611_read_hdmi_pixelclock()
1521 b = hdmi_read(sd, 0x52); in adv7611_read_hdmi_pixelclock()
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/drivers/gpu/drm/sti/
Dsti_hdmi.c170 u32 hdmi_read(struct sti_hdmi *hdmi, int offset) in hdmi_read() function
223 hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA); in hdmi_irq()
229 hdmi_read(hdmi, HDMI_INT_STA); in hdmi_irq()
323 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); in hdmi_infoframe_reset()
390 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); in hdmi_infoframe_write_infopack()
415 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); in hdmi_infoframe_write_infopack()
493 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); in hdmi_audio_infoframe_config()
567 val = hdmi_read(hdmi, HDMI_CFG); in hdmi_swreset()
581 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0) in hdmi_swreset()
584 val = hdmi_read(hdmi, HDMI_CFG); in hdmi_swreset()
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Dsti_hdmi_tx3g4c28phy.c126 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) == 0) { in sti_hdmi_tx3g4c28phy_start()
206 if (hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) in sti_hdmi_tx3g4c28phy_stop()
Dsti_hdmi.h99 u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
/drivers/media/i2c/adv748x/
Dadv748x-hdmi.c120 val = hdmi_read(state, ADV748X_HDMI_LW1); in adv748x_hdmi_has_signal()
129 a = hdmi_read(state, ADV748X_HDMI_TMDS_1); in adv748x_hdmi_read_pixelclock()
130 b = hdmi_read(state, ADV748X_HDMI_TMDS_2); in adv748x_hdmi_read_pixelclock()
296 bt->interlaced = hdmi_read(state, ADV748X_HDMI_F1H1) & in adv748x_hdmi_query_dv_timings()
316 polarity = hdmi_read(state, 0x05); in adv748x_hdmi_query_dv_timings()
Dadv748x.h400 #define hdmi_read(s, r) adv748x_read(s, ADV748X_PAGE_HDMI, r) macro
401 #define hdmi_read16(s, r, m) (((hdmi_read(s, r) << 8) | hdmi_read(s, (r)+1)) & (m))
/drivers/gpu/drm/bridge/synopsys/
Ddw-hdmi-i2s-audio.c30 static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset) in hdmi_read() function