Searched refs:implementation (Results 1 – 25 of 56) sorted by relevance
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23 Mailbox implementation for i.MX Messaging Unit (MU).39 An implementation of the ARM PL320 Interprocessor Communication50 Mailbox implementation for communication with the the firmware59 Mailbox implementation for OMAP family chips with hardware for98 An implementation of the Altera Mailbox soft core. It is used106 An implementation of the BCM2385 Mailbox. It is used to invoke114 Mailbox implementation for STMicroelectonics family chips with121 An implementation of Message Manager slave driver for Keystone134 An implementation of the hi3660 mailbox. It is used to send message144 An implementation of the hi6220 mailbox. It is used to send message[all …]
233 u32 implementation = par->Chipset & 0x0ff0; in nv10GetConfig() local264 if (par->twoHeads && (implementation != 0x0110)) { in nv10GetConfig()278 u16 implementation = par->Chipset & 0x0ff0; in NVCommonSetup() local315 (implementation != 0x0100) && in NVCommonSetup()316 (implementation != 0x0150) && in NVCommonSetup()317 (implementation != 0x01A0) && (implementation != 0x0200); in NVCommonSetup()320 (implementation != 0x0110)); in NVCommonSetup()322 par->twoStagePLL = (implementation == 0x0310) || in NVCommonSetup()323 (implementation == 0x0340) || (par->Architecture >= NV_ARCH_40); in NVCommonSetup()326 (implementation != 0x0100); in NVCommonSetup()[all …]
33 tristate "PCI bus implementation for Mellanox Technologies Switch ASICs"37 This is PCI bus implementation for Mellanox Technologies Switch ASICs.43 tristate "I2C bus implementation for Mellanox Technologies Switch ASICs"47 This is I2C bus implementation for Mellanox Technologies Switch ASICs.
2 * Replace dummy resizer code with a real implementation
41 complies with the generic implementation of the component without80 that complies with the generic implementation of the component without114 bool "Control implementation defined overflow support in ETM 4.x driver"117 This control provides implementation define control for CoreSight
18 also using the CONFIG_MIPS_CPS SMP implementation.
22 This is implementation of PCI interface support for Marvell Prestera
8 implementation of the Motorola Scalable CAN concept targeted for
15 implementation of PSCI_FEATURES(SMCCC_VERSION) which returns
3 This is an implementation of the NVEC protocol used to communicate with an
130 This is the s390 hardware accelerated implementation of the141 This is the s390 hardware accelerated implementation of the151 This is the s390 hardware accelerated implementation of the161 This is the s390 hardware accelerated implementation of the171 This is the s390 hardware accelerated implementation of the181 This is the s390 hardware accelerated implementation of the193 This is the s390 hardware accelerated implementation of the205 This is the s390 hardware accelerated implementation of the234 This is the s390 hardware accelerated implementation of GHASH,
9 tristate "Thermal family implementation"15 tristate "Simple 64bit memory family implementation"
51 implementation of those in the kernel. Looks likes that's done for mst110 be simplified enough to no longer need a vector implementation.
18 DPAA FMan erratum A050385 software workaround implementation:
70 and firmware implementation.
161 info->obj_desc->method.dispatch.implementation(walk_state); in acpi_ps_execute_method()
151 acpi_internal_method implementation; member
10 the host firmware. The implementation only supports SPI NOR.
5 Generic IOTLB implementation for vhost and vringh.
23 * the flow control implementation in firmware is buggy (sends a flood of pause
37 * See nicstar_free_rx_skb and linearize_buffer for implementation
34 This is an implementation of MIPI SyS-T protocol to be used
12 a.k.a. Juju, a new implementation designed for robustness and
61 * There is only a single implementation of struct hpc_ops. Can the struct be
76 Generic power domain implementation for TI device implementing