/drivers/media/v4l2-core/ |
D | v4l2-dv-timings.c | 163 (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) || in v4l2_valid_dv_timings() 164 (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE))) in v4l2_valid_dv_timings() 168 if (!bt->interlaced && in v4l2_valid_dv_timings() 183 if (bt->interlaced && (bt->il_vfrontporch > max_vert || in v4l2_valid_dv_timings() 275 t1->bt.interlaced == t2->bt.interlaced && in v4l2_match_dv_timings() 288 (!t1->bt.interlaced || in v4l2_match_dv_timings() 309 if (bt->interlaced) in v4l2_print_dv_timings() 319 bt->width, bt->height, bt->interlaced ? "i" : "p", in v4l2_print_dv_timings() 333 if (bt->interlaced) in v4l2_print_dv_timings() 495 bool interlaced, in v4l2_detect_cvt() argument [all …]
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/drivers/media/platform/davinci/ |
D | vpbe_osd.c | 137 if (!field_inversion || !lconfig->interlaced) { in _osd_dm6446_vid0_pingpong() 889 lconfig->interlaced = (lconfig->interlaced != 0); in try_layer_config() 890 if (lconfig->interlaced) { in try_layer_config() 999 if (lconfig->interlaced) in _osd_set_layer_config() 1006 if (lconfig->interlaced) { in _osd_set_layer_config() 1016 if (lconfig->interlaced) in _osd_set_layer_config() 1030 if (lconfig->interlaced) { in _osd_set_layer_config() 1062 if (lconfig->interlaced) { in _osd_set_layer_config() 1148 if (lconfig->interlaced) in _osd_set_layer_config() 1155 if (lconfig->interlaced) { in _osd_set_layer_config() [all …]
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/drivers/gpu/drm/ |
D | drm_modes.c | 142 bool reduced, bool interlaced, bool margins) in drm_cvt_mode() argument 176 if (interlaced) in drm_cvt_mode() 194 if (interlaced) in drm_cvt_mode() 207 if (interlaced) in drm_cvt_mode() 327 if (interlaced) { in drm_cvt_mode() 367 int vrefresh, bool interlaced, int margins, in drm_gtf_mode_complex() argument 418 if (interlaced) in drm_gtf_mode_complex() 424 if (interlaced) in drm_gtf_mode_complex() 438 if (interlaced) in drm_gtf_mode_complex() 468 if (interlaced) in drm_gtf_mode_complex() [all …]
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/drivers/media/platform/vsp1/ |
D | vsp1_rpf.c | 85 if (pipe->interlaced) in rpf_configure_stream() 124 if (pipe->interlaced) in rpf_configure_stream() 278 if (pipe->interlaced) { in rpf_configure_partition() 315 if (pipe->interlaced) { in rpf_configure_partition()
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D | vsp1_pipe.h | 146 bool interlaced; member
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/drivers/gpu/ipu-v3/ |
D | ipu-dc.c | 160 int ipu_dc_init_sync(struct ipu_dc *dc, struct ipu_di *di, bool interlaced, in ipu_dc_init_sync() argument 178 sync = interlaced ? 6 : 5; in ipu_dc_init_sync() 186 if (interlaced) { in ipu_dc_init_sync() 213 if (interlaced) in ipu_dc_init_sync()
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/drivers/gpu/drm/sun4i/ |
D | sun8i_ui_layer.c | 103 bool interlaced = false; in sun8i_ui_layer_update_coord() local 115 interlaced = state->crtc->state->adjusted_mode.flags in sun8i_ui_layer_update_coord() 118 if (interlaced) in sun8i_ui_layer_update_coord() 129 interlaced ? "on" : "off"); in sun8i_ui_layer_update_coord()
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D | sun4i_backend.c | 262 bool interlaced = false; in sun4i_backend_update_layer_formats() local 271 interlaced = plane->state->crtc->state->adjusted_mode.flags in sun4i_backend_update_layer_formats() 276 interlaced ? SUN4I_BACKEND_MODCTL_ITLMOD_EN : 0); in sun4i_backend_update_layer_formats() 279 interlaced ? "on" : "off"); in sun4i_backend_update_layer_formats()
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/drivers/gpu/drm/zte/ |
D | zx_vou.c | 356 bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; in zx_crtc_atomic_enable() local 370 val = V_ACTIVE((interlaced ? vm.vactive / 2 : vm.vactive) - 1); in zx_crtc_atomic_enable() 384 if (interlaced) { in zx_crtc_atomic_enable() 414 if (interlaced) in zx_crtc_atomic_enable() 422 interlaced ? scan_mask : 0); in zx_crtc_atomic_enable() 436 interlaced ? CHN_INTERLACE_EN : 0); in zx_crtc_atomic_enable()
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/drivers/video/fbdev/matrox/ |
D | matroxfb_crtc2.h | 30 unsigned int interlaced:1; member
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D | matroxfb_crtc2.c | 105 if (mt->interlaced) { in matroxfb_dh_restore() 129 m2info->interlaced = 1; in matroxfb_dh_restore() 132 m2info->interlaced = 0; in matroxfb_dh_restore() 181 if (m2info->interlaced) { in matroxfb_dh_pan_var()
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/drivers/media/i2c/adv748x/ |
D | adv748x-hdmi.c | 96 fmt->field = hdmi->timings.bt.interlaced ? in adv748x_hdmi_fill_format() 245 timings->bt.interlaced ? in adv748x_hdmi_s_dv_timings() 296 bt->interlaced = hdmi_read(state, ADV748X_HDMI_F1H1) & in adv748x_hdmi_query_dv_timings() 320 if (bt->interlaced == V4L2_DV_INTERLACED) { in adv748x_hdmi_query_dv_timings()
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/drivers/gpu/drm/rcar-du/ |
D | rcar_du_plane.c | 335 bool interlaced; in rcar_du_plane_setup_scanout() local 338 interlaced = state->state.crtc->state->adjusted_mode.flags in rcar_du_plane_setup_scanout() 366 (interlaced && state->format->bpp == 32) ? in rcar_du_plane_setup_scanout() 384 (!interlaced && state->format->bpp == 32 ? 2 : 1)); in rcar_du_plane_setup_scanout()
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D | rcar_du_crtc.c | 596 bool interlaced; in rcar_du_crtc_start() local 603 interlaced = rcrtc->crtc.mode.flags & DRM_MODE_FLAG_INTERLACE; in rcar_du_crtc_start() 605 (interlaced ? DSYSR_SCM_INT_VIDEO : 0) | in rcar_du_crtc_start() 839 bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; in rcar_du_crtc_mode_valid() local 843 if (interlaced && !rcar_du_has(rcdu, RCAR_DU_FEATURE_INTERLACED)) in rcar_du_crtc_mode_valid() 858 vbp = (mode->vtotal - mode->vsync_end) / (interlaced ? 2 : 1); in rcar_du_crtc_mode_valid()
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/drivers/gpu/drm/exynos/ |
D | exynos5433_drm_decon.c | 199 bool interlaced = false; in decon_commit() local 208 interlaced = true; in decon_commit() 215 if (interlaced) in decon_commit() 225 if (interlaced) in decon_commit() 237 if (interlaced) in decon_commit()
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/drivers/gpu/drm/armada/ |
D | armada_crtc.c | 260 if (stat & GRA_FRAME_IRQ && dcrtc->interlaced) { in armada_drm_crtc_irq() 338 bool interlaced = !!(adj->flags & DRM_MODE_FLAG_INTERLACE); in armada_drm_crtc_mode_set_nofb() local 357 dcrtc->interlaced = interlaced; in armada_drm_crtc_mode_set_nofb() 365 if (interlaced) { in armada_drm_crtc_mode_set_nofb() 630 if (dcrtc->interlaced) { in armada_drm_crtc_cursor_update()
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D | armada_plane.h | 23 u16 pitches[3], bool interlaced);
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/drivers/gpu/drm/amd/display/dc/dml/ |
D | dml1_display_rq_dlg_calc.c | 1014 bool interlaced = e2e_pipe_param.pipe.dest.interlaced; in dml1_rq_dlg_get_dlg_params() local 1149 DTRACE("DLG: %s: interlaced = %d", __func__, interlaced); in dml1_rq_dlg_get_dlg_params() 1160 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; /* 15 bits */ in dml1_rq_dlg_get_dlg_params() 1173 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml1_rq_dlg_get_dlg_params() 1254 if (interlaced) in dml1_rq_dlg_get_dlg_params() 1370 max_vinit_l = interlaced ? dml_max(vinit_l, vinit_bot_l) : vinit_l; in dml1_rq_dlg_get_dlg_params() 1371 max_vinit_c = interlaced ? dml_max(vinit_c, vinit_bot_c) : vinit_c; in dml1_rq_dlg_get_dlg_params()
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/drivers/gpu/drm/imx/ |
D | ipuv3-plane.h | 42 uint32_t src_h, bool interlaced);
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/drivers/gpu/drm/amd/display/include/ |
D | audio_types.h | 45 bool interlaced; member
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/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
D | display_rq_dlg_calc_20.c | 817 bool interlaced = dst->interlaced; in dml20_rq_dlg_get_dlg_params() local 926 dml_print("DML_DLG: %s: interlaced = %d\n", __func__, interlaced); in dml20_rq_dlg_get_dlg_params() 933 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml20_rq_dlg_get_dlg_params() 943 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml20_rq_dlg_get_dlg_params() 1037 if (interlaced) { in dml20_rq_dlg_get_dlg_params() 1054 if (interlaced) in dml20_rq_dlg_get_dlg_params()
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D | display_rq_dlg_calc_20v2.c | 817 bool interlaced = dst->interlaced; in dml20v2_rq_dlg_get_dlg_params() local 926 dml_print("DML_DLG: %s: interlaced = %d\n", __func__, interlaced); in dml20v2_rq_dlg_get_dlg_params() 933 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml20v2_rq_dlg_get_dlg_params() 943 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml20v2_rq_dlg_get_dlg_params() 1038 if (interlaced) { in dml20v2_rq_dlg_get_dlg_params() 1055 if (interlaced) in dml20v2_rq_dlg_get_dlg_params()
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/drivers/gpu/drm/rockchip/ |
D | cdn-dp-core.h | 42 bool interlaced; member
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/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
D | display_rq_dlg_calc_21.c | 863 bool interlaced = dst->interlaced; in dml_rq_dlg_get_dlg_params() local 972 dml_print("DML_DLG: %s: interlaced = %d\n", __func__, interlaced); in dml_rq_dlg_get_dlg_params() 979 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml_rq_dlg_get_dlg_params() 989 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml_rq_dlg_get_dlg_params() 1077 if (interlaced) { in dml_rq_dlg_get_dlg_params() 1094 if (interlaced) in dml_rq_dlg_get_dlg_params()
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/drivers/video/fbdev/ |
D | platinumfb.h | 343 int interlaced; member
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