Searched refs:link_clk (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| D | intel_audio.c | 525 unsigned int link_clk, lanes; in calc_hblank_early_prog() local
535 link_clk = crtc_state->port_clock; in calc_hblank_early_prog()
540 h_active, link_clk, lanes, vdsc_bpp, cdclk); in calc_hblank_early_prog()
542 if (WARN_ON(!link_clk || !pixel_clk || !lanes || !vdsc_bpp || !cdclk)) in calc_hblank_early_prog()
545 link_clks_available = (h_total - h_active) * link_clk / pixel_clk - 28; in calc_hblank_early_prog()
551 hblank_delta = DIV64_U64_ROUND_UP(mul_u32_u32(5 * (link_clk + cdclk), pixel_clk), in calc_hblank_early_prog()
552 mul_u32_u32(link_clk, cdclk)); in calc_hblank_early_prog()
555 mul_u32_u32(link_clk * lanes, fec_coeff)); in calc_hblank_early_prog()
556 tu_line = div64_u64(h_active * mul_u32_u32(link_clk, fec_coeff), in calc_hblank_early_prog()
560 …ank_rise = (link_clks_active + 6 * DIV_ROUND_UP(link_clks_active, 250) + 4) * pixel_clk / link_clk; in calc_hblank_early_prog()
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| /drivers/gpu/drm/msm/edp/ |
| D | edp_ctrl.c | 67 struct clk *link_clk; member
171 ctrl->link_clk = msm_clk_get(pdev, "link"); in edp_clk_init()
172 if (IS_ERR(ctrl->link_clk)) { in edp_clk_init()
173 ret = PTR_ERR(ctrl->link_clk); in edp_clk_init()
175 ctrl->link_clk = NULL; in edp_clk_init()
220 ret = clk_set_rate(ctrl->link_clk, in edp_clk_enable()
228 ret = clk_prepare_enable(ctrl->link_clk); in edp_clk_enable()
266 clk_disable_unprepare(ctrl->link_clk); in edp_clk_enable()
284 clk_disable_unprepare(ctrl->link_clk); in edp_clk_disable()
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