Searched refs:m_offset (Results 1 – 9 of 9) sorted by relevance
/drivers/gpu/drm/sun4i/ |
D | sun4i_hdmi_ddc_clk.c | 19 u8 m_offset; member 30 const u8 m_offset, in sun4i_ddc_calc_divider() argument 41 (_m + m_offset); in sun4i_ddc_calc_divider() 68 ddc->m_offset, NULL, NULL); in sun4i_ddc_round_rate() 83 (m + ddc->m_offset); in sun4i_ddc_recalc_rate() 93 ddc->m_offset, &div_m, &div_n); in sun4i_ddc_set_rate() 135 ddc->m_offset = hdmi->variant->ddc_clk_m_offset; in sun4i_ddc_create()
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/drivers/clk/ingenic/ |
D | x1830-cgu.c | 120 .m_offset = 1, 143 .m_offset = 1, 166 .m_offset = 1, 189 .m_offset = 1,
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D | cgu.h | 51 u8 m_shift, m_bits, m_offset; member
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D | x1000-cgu.c | 192 .m_offset = 1, 215 .m_offset = 1,
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D | jz4770-cgu.c | 110 .m_offset = 1, 134 .m_offset = 1,
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D | jz4740-cgu.c | 77 .m_offset = 2,
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D | jz4725b-cgu.c | 62 .m_offset = 2,
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D | cgu.c | 96 m += pll_info->m_offset; in ingenic_pll_recalc_rate() 142 m = max_t(unsigned, m, pll_info->m_offset); in ingenic_pll_calc() 198 ctl |= (m - pll_info->m_offset) << pll_info->m_shift; in ingenic_pll_set_rate()
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D | jz4780-cgu.c | 278 .m_offset = 1, \
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