| /drivers/phy/intel/ |
| D | phy-intel-keembay-emmc.c | 59 unsigned int mhz; in keembay_emmc_phy_power() local
84 mhz = DIV_ROUND_CLOSEST(clk_get_rate(priv->emmcclk), 1000000); in keembay_emmc_phy_power()
85 if (mhz <= 200 && mhz >= 170) in keembay_emmc_phy_power()
87 else if (mhz <= 170 && mhz >= 140) in keembay_emmc_phy_power()
89 else if (mhz <= 140 && mhz >= 110) in keembay_emmc_phy_power()
91 else if (mhz <= 110 && mhz >= 80) in keembay_emmc_phy_power()
93 else if (mhz <= 80 && mhz >= 50) in keembay_emmc_phy_power()
99 if (mhz > 175) in keembay_emmc_phy_power()
100 dev_warn(&phy->dev, "Unsupported rate: %d MHz\n", mhz); in keembay_emmc_phy_power()
156 if (mhz == 0) in keembay_emmc_phy_power()
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| /drivers/cpufreq/ |
| D | cppc_cpufreq.c | 64 u16 *mhz = (u16 *)private; in cppc_find_dmi_mhz() local
70 *mhz = val > *mhz ? val : *mhz; in cppc_find_dmi_mhz()
77 u16 mhz = 0; in cppc_get_dmi_max_khz() local
79 dmi_walk(cppc_find_dmi_mhz, &mhz); in cppc_get_dmi_max_khz()
85 mhz = mhz ? mhz : 1; in cppc_get_dmi_max_khz()
87 return (1000 * mhz); in cppc_get_dmi_max_khz()
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| D | speedstep-centrino.c | 85 #define OP(mhz, mv) \ argument
87 .frequency = (mhz) * 1000, \
88 .driver_data = (((mhz)/100) << 8) | ((mv - 700) / 16) \
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| /drivers/gpu/drm/amd/display/dc/ |
| D | dm_pp_smu.h | 118 void (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int mhz);
124 void (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int mhz);
129 void (*set_hard_min_fclk_by_freq)(struct pp_smu *pp, int mhz);
134 void (*set_hard_min_socclk_by_freq)(struct pp_smu *pp, int mhz);
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_pp_smu.c | 649 void pp_rv_set_hard_min_fclk_by_freq(struct pp_smu *pp, int mhz) in pp_rv_set_hard_min_fclk_by_freq() argument
659 pp_funcs->set_hard_min_fclk_by_freq(pp_handle, mhz); in pp_rv_set_hard_min_fclk_by_freq()
706 pp_nv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int mhz) in pp_nv_set_min_deep_sleep_dcfclk() argument
716 if (smu_set_deep_sleep_dcefclk(smu, mhz)) in pp_nv_set_min_deep_sleep_dcfclk()
723 struct pp_smu *pp, int mhz) in pp_nv_set_hard_min_dcefclk_by_freq() argument
734 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_dcefclk_by_freq()
746 pp_nv_set_hard_min_uclk_by_freq(struct pp_smu *pp, int mhz) in pp_nv_set_hard_min_uclk_by_freq() argument
757 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_uclk_by_freq()
782 enum pp_smu_nv_clock_id clock_id, int mhz) in pp_nv_set_voltage_by_freq() argument
805 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_voltage_by_freq()
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| /drivers/scsi/ |
| D | wd33c93.h | 149 #define WD33C93_FS_MHZ(mhz) (mhz) argument
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| D | esp_scsi.h | 246 #define ESP_NEG_DEFP(mhz, cfact) \ argument
247 ((ESP_BUS_TIMEOUT * ((mhz) / 1000)) / (8192 * (cfact)))
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| D | wd33c93.c | 1864 calc_sx_table(unsigned int mhz, struct sx_period sx_table[9]) in calc_sx_table() argument
1867 if (mhz < 11) in calc_sx_table()
1869 else if (mhz < 16) in calc_sx_table()
1874 d = (100000 * d) / 2 / mhz; /* 100 x DTCC / nanosec */ in calc_sx_table()
1891 set_clk_freq(int freq, int *mhz) in set_clk_freq() argument
1911 *mhz = freq; in set_clk_freq()
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| /drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| D | rammap.c | 133 nvbios_rammapEm(struct nvkm_bios *bios, u16 mhz, in nvbios_rammapEm() argument
139 if (mhz >= info->rammap_min && mhz <= info->rammap_max) in nvbios_rammapEm()
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| /drivers/net/wireless/intersil/prism54/ |
| D | oid_mgt.c | 300 freq->mhz[i] = le16_to_cpu(freq->mhz[i]); in mgt_le_to_cpu()
369 freq->mhz[i] = cpu_to_le16(freq->mhz[i]); in mgt_cpu_to_le()
825 "mhz[%u]=%u\n", i, freq->mhz[i]); in mgt_response_to_str()
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| D | isl_oid.h | 76 u16 mhz[]; member
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| D | isl_ioctl.c | 496 range->freq[i].m = freq->mhz[i]; in prism54_get_range()
498 range->freq[i].i = channel_of_freq(freq->mhz[i]); in prism54_get_range()
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| /drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| D | rammap.h | 15 u32 nvbios_rammapEm(struct nvkm_bios *, u16 mhz,
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| /drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | ramgk104.c | 966 u32 mhz = khz / 1000; in gk104_ram_calc_data() local
969 if (mhz >= cfg->bios.rammap_min && in gk104_ram_calc_data()
970 mhz <= cfg->bios.rammap_max) { in gk104_ram_calc_data()
977 nvkm_error(subdev, "ramcfg data for %dMHz not found\n", mhz); in gk104_ram_calc_data()
1159 u32 mhz = freq / 1000; in gk104_ram_prog_0() local
1163 if (mhz >= cfg->bios.rammap_min && in gk104_ram_prog_0()
1164 mhz <= cfg->bios.rammap_max) in gk104_ram_prog_0()
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| /drivers/net/wireless/ath/ath11k/ |
| D | reg.c | 152 ch->mhz = channel->center_freq; in ath11k_reg_update_chan_list()
172 ch->mhz, ch->maxpower, ch->maxregpower, in ath11k_reg_update_chan_list()
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| D | wmi.c | 782 chan->mhz = arg->channel.freq; in ath11k_wmi_put_wmi_channel()
2324 chan_info->mhz = tchan_info->mhz; in ath11k_wmi_send_scan_chan_list_cmd()
2358 i, chan_info->mhz, chan_info->info); in ath11k_wmi_send_scan_chan_list_cmd()
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| D | wmi.h | 2549 u32 mhz; member
3336 u32 mhz; member
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| /drivers/mmc/host/ |
| D | sdhci-of-arasan.c | 980 u32 mhz = DIV_ROUND_CLOSEST(clk_get_rate(pltfm_host->clk), 1000000); in sdhci_arasan_update_baseclkfreq() local
993 sdhci_arasan_syscon_write(host, &soc_ctl_map->baseclkfreq, mhz); in sdhci_arasan_update_baseclkfreq()
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| /drivers/net/wireless/ath/ath10k/ |
| D | wmi.h | 2047 __le32 mhz; member
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| D | wmi.c | 1720 ch->mhz = __cpu_to_le32(arg->freq); in ath10k_wmi_put_wmi_channel()
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