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Searched refs:mmCM3_CM_DGAM_CONTROL (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h5102 #define mmCM3_CM_DGAM_CONTROL … macro
Ddcn_2_1_0_offset.h5214 #define mmCM3_CM_DGAM_CONTROL … macro
Ddcn_2_0_0_offset.h6152 #define mmCM3_CM_DGAM_CONTROL … macro