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Searched refs:mmCM3_CM_ICSC_B_C33_C34 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h5182 #define mmCM3_CM_ICSC_B_C33_C34 macro
Ddcn_2_0_0_offset.h6120 #define mmCM3_CM_ICSC_B_C33_C34 macro