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Searched refs:mmCM5_CM_GAMUT_REMAP_B_C33_C34_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_0_offset.h15659 #define mmCM5_CM_GAMUT_REMAP_B_C33_C34_BASE_IDX … macro
Ddcn_3_0_0_offset.h7511 #define mmCM5_CM_GAMUT_REMAP_B_C33_C34_BASE_IDX … macro