Searched refs:mmCM5_CM_MEM_PWR_STATUS (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/amd/include/asic_reg/dcn/ | ||
| D | dcn_2_0_0_offset.h | 15880 #define mmCM5_CM_MEM_PWR_STATUS … macro |
| D | dcn_3_0_0_offset.h | 7816 #define mmCM5_CM_MEM_PWR_STATUS … macro |