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Searched refs:mmCNVC_CFG5_FCNV_FP_BIAS_R (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_0_offset.h15494 #define mmCNVC_CFG5_FCNV_FP_BIAS_R macro
Ddcn_3_0_0_offset.h7312 #define mmCNVC_CFG5_FCNV_FP_BIAS_R macro