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Searched refs:mmDC_GPIO_DDC1_A_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h10498 #define mmDC_GPIO_DDC1_A_BASE_IDX … macro
Ddcn_2_1_0_offset.h11392 #define mmDC_GPIO_DDC1_A_BASE_IDX … macro
Ddcn_2_0_0_offset.h12813 #define mmDC_GPIO_DDC1_A_BASE_IDX … macro
Ddcn_3_0_0_offset.h12617 #define mmDC_GPIO_DDC1_A_BASE_IDX … macro
/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h1971 #define mmDC_GPIO_DDC1_A_BASE_IDX … macro