Home
last modified time | relevance | path

Searched refs:mmDC_I2C_CONTROL_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h7668 #define mmDC_I2C_CONTROL_BASE_IDX … macro
Ddcn_2_1_0_offset.h9262 #define mmDC_I2C_CONTROL_BASE_IDX … macro
Ddcn_2_0_0_offset.h10293 #define mmDC_I2C_CONTROL_BASE_IDX … macro
Ddcn_3_0_0_offset.h10021 #define mmDC_I2C_CONTROL_BASE_IDX … macro
/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h1637 #define mmDC_I2C_CONTROL_BASE_IDX … macro