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Searched refs:mmDC_I2C_DDC4_HW_STATUS (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h1323 #define mmDC_I2C_DDC4_HW_STATUS 0x1820 macro
Ddce_8_0_d.h3549 #define mmDC_I2C_DDC4_HW_STATUS 0x1820 macro
Ddce_10_0_d.h7163 #define mmDC_I2C_DDC4_HW_STATUS 0x16db macro
Ddce_11_0_d.h7352 #define mmDC_I2C_DDC4_HW_STATUS 0x16db macro
Ddce_11_2_d.h8745 #define mmDC_I2C_DDC4_HW_STATUS 0x16db macro
Ddce_12_0_offset.h1650 #define mmDC_I2C_DDC4_HW_STATUS macro
/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h7681 #define mmDC_I2C_DDC4_HW_STATUS macro
Ddcn_2_1_0_offset.h9275 #define mmDC_I2C_DDC4_HW_STATUS macro
Ddcn_2_0_0_offset.h10306 #define mmDC_I2C_DDC4_HW_STATUS macro
Ddcn_3_0_0_offset.h10034 #define mmDC_I2C_DDC4_HW_STATUS macro