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Searched refs:mmDP3_DP_SEC_CNTL7 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h9411 #define mmDP3_DP_SEC_CNTL7 … macro
Ddcn_2_1_0_offset.h10975 #define mmDP3_DP_SEC_CNTL7 … macro
Ddcn_2_0_0_offset.h12062 #define mmDP3_DP_SEC_CNTL7 … macro
Ddcn_3_0_0_offset.h11829 #define mmDP3_DP_SEC_CNTL7 … macro