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Searched refs:mmDP5_DP_LINK_CNTL (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3391 #define mmDP5_DP_LINK_CNTL 0x4BC0 macro
Ddce_8_0_d.h3761 #define mmDP5_DP_LINK_CNTL 0x4bc0 macro
Ddce_10_0_d.h4393 #define mmDP5_DP_LINK_CNTL 0x4fa0 macro
Ddce_11_0_d.h4343 #define mmDP5_DP_LINK_CNTL 0x4fa0 macro
Ddce_11_2_d.h5575 #define mmDP5_DP_LINK_CNTL 0x4fa0 macro
Ddce_12_0_offset.h11616 #define mmDP5_DP_LINK_CNTL macro
/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h9899 #define mmDP5_DP_LINK_CNTL macro
Ddcn_2_0_0_offset.h12586 #define mmDP5_DP_LINK_CNTL macro
Ddcn_3_0_0_offset.h12382 #define mmDP5_DP_LINK_CNTL macro