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Searched refs:mmDPG5_DPG_CONTROL (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h7699 #define mmDPG5_DPG_CONTROL … macro
Ddcn_2_0_0_offset.h8730 #define mmDPG5_DPG_CONTROL … macro
Ddcn_3_0_0_offset.h8420 #define mmDPG5_DPG_CONTROL … macro