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Searched refs:mmDSCL3_DSCL_2TAP_CONTROL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h4946 #define mmDSCL3_DSCL_2TAP_CONTROL … macro
Ddcn_2_1_0_offset.h5094 #define mmDSCL3_DSCL_2TAP_CONTROL … macro
Ddcn_2_0_0_offset.h6032 #define mmDSCL3_DSCL_2TAP_CONTROL … macro
Ddcn_3_0_0_offset.h6020 #define mmDSCL3_DSCL_2TAP_CONTROL … macro