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Searched refs:mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_OFFSET (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_8_2_d.h843 #define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_OFFSET 0x5ec9 macro
Dgmc_8_1_d.h1641 #define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_OFFSET 0x5ec9 macro
/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h1514 #define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_OFFSET macro
Ddcn_2_1_0_offset.h1100 #define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_OFFSET macro
Ddcn_2_0_0_offset.h1138 #define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_OFFSET macro
/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h350 #define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_OFFSET macro