Home
last modified time | relevance | path

Searched refs:mmMCIF_WB1_MCIF_WB_WARM_UP_CNTL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h1554 #define mmMCIF_WB1_MCIF_WB_WARM_UP_CNTL … macro
Ddcn_2_1_0_offset.h1140 #define mmMCIF_WB1_MCIF_WB_WARM_UP_CNTL … macro
Ddcn_2_0_0_offset.h1178 #define mmMCIF_WB1_MCIF_WB_WARM_UP_CNTL … macro
/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h390 #define mmMCIF_WB1_MCIF_WB_WARM_UP_CNTL … macro