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Searched refs:mmMC_SEQ_CAS_TIMING_LP (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_d.h869 #define mmMC_SEQ_CAS_TIMING_LP 0x0A9C macro
Dgmc_7_1_d.h813 #define mmMC_SEQ_CAS_TIMING_LP 0xa9c macro
Dgmc_8_1_d.h917 #define mmMC_SEQ_CAS_TIMING_LP 0xa9c macro
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c2400 *out_reg = mmMC_SEQ_CAS_TIMING_LP; in iceland_check_s0_mc_reg_index()
2617 …cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
Dtonga_smumgr.c2863 *out_reg = mmMC_SEQ_CAS_TIMING_LP; in tonga_check_s0_mc_reg_index()
3083 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, in tonga_initialize_mc_reg_table()
Dci_smumgr.c2472 *out_reg = mmMC_SEQ_CAS_TIMING_LP; in ci_check_s0_mc_reg_index()
2689 …cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in ci_initialize_mc_reg_table()
Dfiji_smumgr.c2527 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, in fiji_initialize_mc_reg_table()