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Searched refs:mmMPCC3_MPCC_OPP_ID (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h5461 #define mmMPCC3_MPCC_OPP_ID macro
Ddcn_2_1_0_offset.h5704 #define mmMPCC3_MPCC_OPP_ID macro
Ddcn_2_0_0_offset.h6642 #define mmMPCC3_MPCC_OPP_ID macro
Ddcn_3_0_0_offset.h13852 #define mmMPCC3_MPCC_OPP_ID macro