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Searched refs:mmMPLL_DQ_1_1_STATUS (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_d.h1207 #define mmMPLL_DQ_1_1_STATUS 0x0AFA macro
Dgmc_7_1_d.h873 #define mmMPLL_DQ_1_1_STATUS 0xafa macro
Dgmc_8_1_d.h977 #define mmMPLL_DQ_1_1_STATUS 0xafa macro