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Searched refs:mmOTG5_PHYPLL_PIXEL_RATE_CNTL (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h618 #define mmOTG5_PHYPLL_PIXEL_RATE_CNTL … macro
Ddcn_2_0_0_offset.h256 #define mmOTG5_PHYPLL_PIXEL_RATE_CNTL … macro
Ddcn_3_0_0_offset.h237 #define mmOTG5_PHYPLL_PIXEL_RATE_CNTL … macro