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Searched refs:msp (Results 1 – 7 of 7) sorted by relevance

/drivers/net/ethernet/mellanox/mlx5/core/en/
Dhealth.c165 struct mlx5e_modify_sq_param msp = {}; in mlx5e_health_sq_to_ready() local
168 msp.curr_state = MLX5_SQC_STATE_ERR; in mlx5e_health_sq_to_ready()
169 msp.next_state = MLX5_SQC_STATE_RST; in mlx5e_health_sq_to_ready()
171 err = mlx5e_modify_sq(mdev, sqn, &msp); in mlx5e_health_sq_to_ready()
177 memset(&msp, 0, sizeof(msp)); in mlx5e_health_sq_to_ready()
178 msp.curr_state = MLX5_SQC_STATE_RST; in mlx5e_health_sq_to_ready()
179 msp.next_state = MLX5_SQC_STATE_RDY; in mlx5e_health_sq_to_ready()
181 err = mlx5e_modify_sq(mdev, sqn, &msp); in mlx5e_health_sq_to_ready()
/drivers/net/ethernet/marvell/
Dmv643xx_eth.c2615 mv643xx_eth_conf_mbus_windows(struct mv643xx_eth_shared_private *msp, in mv643xx_eth_conf_mbus_windows() argument
2618 void __iomem *base = msp->base; in mv643xx_eth_conf_mbus_windows()
2646 msp->win_protect = win_protect; in mv643xx_eth_conf_mbus_windows()
2649 static void infer_hw_params(struct mv643xx_eth_shared_private *msp) in infer_hw_params() argument
2656 writel(0x02000000, msp->base + 0x0400 + SDMA_CONFIG); in infer_hw_params()
2657 if (readl(msp->base + 0x0400 + SDMA_CONFIG) & 0x02000000) in infer_hw_params()
2658 msp->extended_rx_coal_limit = 1; in infer_hw_params()
2660 msp->extended_rx_coal_limit = 0; in infer_hw_params()
2667 writel(1, msp->base + 0x0400 + TX_BW_MTU_MOVED); in infer_hw_params()
2668 if (readl(msp->base + 0x0400 + TX_BW_MTU_MOVED) & 1) { in infer_hw_params()
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/drivers/pci/hotplug/
Dshpchp_ctrl.c195 enum pci_bus_speed msp) in fix_bus_speed() argument
212 if (asp < msp) { in fix_bus_speed()
216 if (bsp != msp) in fix_bus_speed()
217 rc = change_bus_speed(ctrl, pslot, msp); in fix_bus_speed()
234 enum pci_bus_speed asp, bsp, msp; in board_added() local
273 msp = ctrl->pci_dev->subordinate->max_bus_speed; in board_added()
281 bsp, msp); in board_added()
283 rc = fix_bus_speed(ctrl, p_slot, slots_not_empty, asp, bsp, msp); in board_added()
/drivers/net/ethernet/mellanox/mlx5/core/
Den_main.c1315 struct mlx5e_modify_sq_param msp = {0}; in mlx5e_create_sq_rdy() local
1322 msp.curr_state = MLX5_SQC_STATE_RST; in mlx5e_create_sq_rdy()
1323 msp.next_state = MLX5_SQC_STATE_RDY; in mlx5e_create_sq_rdy()
1324 err = mlx5e_modify_sq(mdev, *sqn, &msp); in mlx5e_create_sq_rdy()
1765 struct mlx5e_modify_sq_param msp = {0}; in mlx5e_set_sq_maxrate() local
1792 msp.curr_state = MLX5_SQC_STATE_RDY; in mlx5e_set_sq_maxrate()
1793 msp.next_state = MLX5_SQC_STATE_RDY; in mlx5e_set_sq_maxrate()
1794 msp.rl_index = rl_index; in mlx5e_set_sq_maxrate()
1795 msp.rl_update = true; in mlx5e_set_sq_maxrate()
1796 err = mlx5e_modify_sq(mdev, sq->sqn, &msp); in mlx5e_set_sq_maxrate()
/drivers/media/pci/bt8xx/
Dbttv-cards.c3067 int id,msp,gpio; in miro_pinnacle_gpio() local
3073 msp = bttv_I2CRead(btv, I2C_ADDR_MSP3400, "MSP34xx"); in miro_pinnacle_gpio()
3089 if (-1 != msp) { in miro_pinnacle_gpio()
3099 (-1 == msp) ? "no" : "yes"); in miro_pinnacle_gpio()
3139 if (-1 != msp) in miro_pinnacle_gpio()
/drivers/infiniband/hw/qib/
Dqib_iba7322.c1369 const struct qib_hwerror_msgs *msp) in err_decode() argument
1374 while (errs && msp && msp->mask) { in err_decode()
1375 multi = (msp->mask & (msp->mask - 1)); in err_decode()
1376 while (errs & msp->mask) { in err_decode()
1377 these = (errs & msp->mask); in err_decode()
1386 took = min_t(size_t, msp->sz - (size_t)1, len); in err_decode()
1387 memcpy(msg, msp->msg, took); in err_decode()
1398 while (lmask & msp->mask) { in err_decode()
1407 ++msp; in err_decode()
/drivers/media/pci/ngene/
Dngene.h854 u8 msp[4]; member