| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_vm_sdma.c | 66 unsigned int ndw = AMDGPU_VM_SDMA_MIN_NUM_DW; in amdgpu_vm_sdma_prepare() local
69 r = amdgpu_job_alloc_with_ib(p->adev, ndw * 4, pool, &p->job); in amdgpu_vm_sdma_prepare()
73 p->num_dw_left = ndw; in amdgpu_vm_sdma_prepare()
206 unsigned int i, ndw, nptes; in amdgpu_vm_sdma_update() local
216 ndw = p->num_dw_left; in amdgpu_vm_sdma_update()
217 ndw -= p->job->ibs->length_dw; in amdgpu_vm_sdma_update()
219 if (ndw < 32) { in amdgpu_vm_sdma_update()
225 ndw = 32; in amdgpu_vm_sdma_update()
227 ndw += count * 2; in amdgpu_vm_sdma_update()
228 ndw = max(ndw, AMDGPU_VM_SDMA_MIN_NUM_DW); in amdgpu_vm_sdma_update()
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| D | si_dma.c | 343 unsigned ndw = count * 2; in si_dma_vm_write_pte() local
345 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw); in si_dma_vm_write_pte()
348 for (; ndw > 0; ndw -= 2) { in si_dma_vm_write_pte()
373 unsigned ndw; in si_dma_vm_set_pte_pde() local
376 ndw = count * 2; in si_dma_vm_set_pte_pde()
377 if (ndw > 0xFFFFE) in si_dma_vm_set_pte_pde()
378 ndw = 0xFFFFE; in si_dma_vm_set_pte_pde()
386 ib->ptr[ib->length_dw++] = DMA_PTE_PDE_PACKET(ndw); in si_dma_vm_set_pte_pde()
395 pe += ndw * 4; in si_dma_vm_set_pte_pde()
396 addr += (ndw / 2) * incr; in si_dma_vm_set_pte_pde()
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| D | amdgpu_ring.c | 62 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw) in amdgpu_ring_alloc() argument
66 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc()
71 if (WARN_ON_ONCE(ndw > ring->max_dw)) in amdgpu_ring_alloc()
74 ring->count_dw = ndw; in amdgpu_ring_alloc()
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| D | sdma_v2_4.c | 697 unsigned ndw = count * 2; in sdma_v2_4_vm_write_pte() local
703 ib->ptr[ib->length_dw++] = ndw; in sdma_v2_4_vm_write_pte()
704 for (; ndw > 0; ndw -= 2) { in sdma_v2_4_vm_write_pte()
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| D | cik_sdma.c | 758 unsigned ndw = count * 2; in cik_sdma_vm_write_pte() local
764 ib->ptr[ib->length_dw++] = ndw; in cik_sdma_vm_write_pte()
765 for (; ndw > 0; ndw -= 2) { in cik_sdma_vm_write_pte()
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| D | sdma_v3_0.c | 968 unsigned ndw = count * 2; in sdma_v3_0_vm_write_pte() local
974 ib->ptr[ib->length_dw++] = ndw; in sdma_v3_0_vm_write_pte()
975 for (; ndw > 0; ndw -= 2) { in sdma_v3_0_vm_write_pte()
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| D | mes_v10_1.c | 88 int ndw = size / 4; in mes_v10_1_submit_pkt_and_poll_completion() local
96 if (amdgpu_ring_alloc(ring, ndw)) in mes_v10_1_submit_pkt_and_poll_completion()
99 amdgpu_ring_write_multiple(ring, pkt, ndw); in mes_v10_1_submit_pkt_and_poll_completion()
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| D | sdma_v5_2.c | 1015 unsigned ndw = count * 2; in sdma_v5_2_vm_write_pte() local
1021 ib->ptr[ib->length_dw++] = ndw - 1; in sdma_v5_2_vm_write_pte()
1022 for (; ndw > 0; ndw -= 2) { in sdma_v5_2_vm_write_pte()
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| D | sdma_v5_0.c | 1079 unsigned ndw = count * 2; in sdma_v5_0_vm_write_pte() local
1085 ib->ptr[ib->length_dw++] = ndw - 1; in sdma_v5_0_vm_write_pte()
1086 for (; ndw > 0; ndw -= 2) { in sdma_v5_0_vm_write_pte()
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| D | gmc_v9_0.c | 859 unsigned int ndw = kiq->pmf->invalidate_tlbs_size + 8; in gmc_v9_0_flush_gpu_tlb_pasid() local
862 ndw += kiq->pmf->invalidate_tlbs_size; in gmc_v9_0_flush_gpu_tlb_pasid()
866 amdgpu_ring_alloc(ring, ndw); in gmc_v9_0_flush_gpu_tlb_pasid()
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| D | amdgpu_ring.h | 281 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw);
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| D | sdma_v4_0.c | 1683 unsigned ndw = count * 2; in sdma_v4_0_vm_write_pte() local
1689 ib->ptr[ib->length_dw++] = ndw - 1; in sdma_v4_0_vm_write_pte()
1690 for (; ndw > 0; ndw -= 2) { in sdma_v4_0_vm_write_pte()
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| /drivers/gpu/drm/radeon/ |
| D | ni_dma.c | 320 unsigned ndw; in cayman_dma_vm_copy_pages() local
323 ndw = count * 2; in cayman_dma_vm_copy_pages()
324 if (ndw > 0xFFFFE) in cayman_dma_vm_copy_pages()
325 ndw = 0xFFFFE; in cayman_dma_vm_copy_pages()
328 0, 0, ndw); in cayman_dma_vm_copy_pages()
334 pe += ndw * 4; in cayman_dma_vm_copy_pages()
335 src += ndw * 4; in cayman_dma_vm_copy_pages()
336 count -= ndw / 2; in cayman_dma_vm_copy_pages()
360 unsigned ndw; in cayman_dma_vm_write_pages() local
363 ndw = count * 2; in cayman_dma_vm_write_pages()
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| D | si_dma.c | 112 unsigned ndw; in si_dma_vm_write_pages() local
115 ndw = count * 2; in si_dma_vm_write_pages()
116 if (ndw > 0xFFFFE) in si_dma_vm_write_pages()
117 ndw = 0xFFFFE; in si_dma_vm_write_pages()
120 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw); in si_dma_vm_write_pages()
123 for (; ndw > 0; ndw -= 2, --count, pe += 8) { in si_dma_vm_write_pages()
159 unsigned ndw; in si_dma_vm_set_pages() local
162 ndw = count * 2; in si_dma_vm_set_pages()
163 if (ndw > 0xFFFFE) in si_dma_vm_set_pages()
164 ndw = 0xFFFFE; in si_dma_vm_set_pages()
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| D | radeon_ring.c | 108 int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw) in radeon_ring_alloc() argument
113 if (ndw > (ring->ring_size / 4)) in radeon_ring_alloc()
118 ndw = (ndw + ring->align_mask) & ~ring->align_mask; in radeon_ring_alloc()
119 while (ndw > (ring->ring_free_dw - 1)) { in radeon_ring_alloc()
121 if (ndw < ring->ring_free_dw) { in radeon_ring_alloc()
128 ring->count_dw = ndw; in radeon_ring_alloc()
144 int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw) in radeon_ring_lock() argument
149 r = radeon_ring_alloc(rdev, ring, ndw); in radeon_ring_lock()
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| D | cik_sdma.c | 848 unsigned ndw; in cik_sdma_vm_write_pages() local
851 ndw = count * 2; in cik_sdma_vm_write_pages()
852 if (ndw > 0xFFFFE) in cik_sdma_vm_write_pages()
853 ndw = 0xFFFFE; in cik_sdma_vm_write_pages()
860 ib->ptr[ib->length_dw++] = ndw; in cik_sdma_vm_write_pages()
861 for (; ndw > 0; ndw -= 2, --count, pe += 8) { in cik_sdma_vm_write_pages()
897 unsigned ndw; in cik_sdma_vm_set_pages() local
900 ndw = count; in cik_sdma_vm_set_pages()
901 if (ndw > 0x7FFFF) in cik_sdma_vm_set_pages()
902 ndw = 0x7FFFF; in cik_sdma_vm_set_pages()
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| D | radeon_vm.c | 648 unsigned count = 0, pt_idx, ndw; in radeon_vm_update_page_directory() local
653 ndw = 64; in radeon_vm_update_page_directory()
656 ndw += vm->max_pde_used * 6; in radeon_vm_update_page_directory()
659 if (ndw > 0xfffff) in radeon_vm_update_page_directory()
662 r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4); in radeon_vm_update_page_directory()
706 WARN_ON(ib.length_dw > ndw); in radeon_vm_update_page_directory()
918 unsigned nptes, ncmds, ndw; in radeon_vm_bo_update() local
974 ndw = 64; in radeon_vm_bo_update()
979 ndw += ncmds * 7; in radeon_vm_bo_update()
983 ndw += ncmds * 4; in radeon_vm_bo_update()
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| D | r100.c | 902 unsigned ndw; in r100_copy_blit() local
914 ndw = 64 + (10 * num_loops); in r100_copy_blit()
915 r = radeon_ring_lock(rdev, ring, ndw); in r100_copy_blit()
917 DRM_ERROR("radeon: moving bo (%d) asking for %u dw.\n", r, ndw); in r100_copy_blit()
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| D | radeon.h | 1023 int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ndw);
1024 int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ndw);
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