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Searched refs:nfc (Results 1 – 25 of 31) sorted by relevance

12

/drivers/mtd/nand/raw/
Dmxic_nand.c184 static int mxic_nfc_clk_enable(struct mxic_nand_ctlr *nfc) in mxic_nfc_clk_enable() argument
188 ret = clk_prepare_enable(nfc->ps_clk); in mxic_nfc_clk_enable()
192 ret = clk_prepare_enable(nfc->send_clk); in mxic_nfc_clk_enable()
196 ret = clk_prepare_enable(nfc->send_dly_clk); in mxic_nfc_clk_enable()
203 clk_disable_unprepare(nfc->send_clk); in mxic_nfc_clk_enable()
205 clk_disable_unprepare(nfc->ps_clk); in mxic_nfc_clk_enable()
210 static void mxic_nfc_clk_disable(struct mxic_nand_ctlr *nfc) in mxic_nfc_clk_disable() argument
212 clk_disable_unprepare(nfc->send_clk); in mxic_nfc_clk_disable()
213 clk_disable_unprepare(nfc->send_dly_clk); in mxic_nfc_clk_disable()
214 clk_disable_unprepare(nfc->ps_clk); in mxic_nfc_clk_disable()
[all …]
Dvf610_nfc.c173 static inline u32 vf610_nfc_read(struct vf610_nfc *nfc, uint reg) in vf610_nfc_read() argument
175 return readl(nfc->regs + reg); in vf610_nfc_read()
178 static inline void vf610_nfc_write(struct vf610_nfc *nfc, uint reg, u32 val) in vf610_nfc_write() argument
180 writel(val, nfc->regs + reg); in vf610_nfc_write()
183 static inline void vf610_nfc_set(struct vf610_nfc *nfc, uint reg, u32 bits) in vf610_nfc_set() argument
185 vf610_nfc_write(nfc, reg, vf610_nfc_read(nfc, reg) | bits); in vf610_nfc_set()
188 static inline void vf610_nfc_clear(struct vf610_nfc *nfc, uint reg, u32 bits) in vf610_nfc_clear() argument
190 vf610_nfc_write(nfc, reg, vf610_nfc_read(nfc, reg) & ~bits); in vf610_nfc_clear()
193 static inline void vf610_nfc_set_field(struct vf610_nfc *nfc, u32 reg, in vf610_nfc_set_field() argument
196 vf610_nfc_write(nfc, reg, in vf610_nfc_set_field()
[all …]
Dstm32_fmc2_nand.c281 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_timings_init() local
287 regmap_update_bits(nfc->regmap, FMC2_PCR, in stm32_fmc2_nfc_timings_init()
297 regmap_write(nfc->regmap, FMC2_PMEM, pmem); in stm32_fmc2_nfc_timings_init()
304 regmap_write(nfc->regmap, FMC2_PATT, patt); in stm32_fmc2_nfc_timings_init()
309 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_setup() local
331 regmap_update_bits(nfc->regmap, FMC2_PCR, pcr_mask, pcr); in stm32_fmc2_nfc_setup()
336 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_select_chip() local
341 if (nand->cs_used[chipnr] == nfc->cs_sel) in stm32_fmc2_nfc_select_chip()
344 nfc->cs_sel = nand->cs_used[chipnr]; in stm32_fmc2_nfc_select_chip()
348 if (nfc->dma_tx_ch && nfc->dma_rx_ch) { in stm32_fmc2_nfc_select_chip()
[all …]
Dmtk_nand.c217 struct mtk_nfc *nfc = nand_get_controller_data(chip); in mtk_data_ptr() local
219 return nfc->buffer + i * mtk_data_len(chip); in mtk_data_ptr()
224 struct mtk_nfc *nfc = nand_get_controller_data(chip); in mtk_oob_ptr() local
226 return nfc->buffer + i * mtk_data_len(chip) + chip->ecc.size; in mtk_oob_ptr()
229 static inline void nfi_writel(struct mtk_nfc *nfc, u32 val, u32 reg) in nfi_writel() argument
231 writel(val, nfc->regs + reg); in nfi_writel()
234 static inline void nfi_writew(struct mtk_nfc *nfc, u16 val, u32 reg) in nfi_writew() argument
236 writew(val, nfc->regs + reg); in nfi_writew()
239 static inline void nfi_writeb(struct mtk_nfc *nfc, u8 val, u32 reg) in nfi_writeb() argument
241 writeb(val, nfc->regs + reg); in nfi_writeb()
[all …]
Dmeson_nand.c227 struct meson_nfc *nfc = nand_get_controller_data(nand); in meson_nfc_select_chip() local
233 nfc->param.chip_select = meson_chip->sels[chip] ? NAND_CE1 : NAND_CE0; in meson_nfc_select_chip()
234 nfc->param.rb_select = nfc->param.chip_select; in meson_nfc_select_chip()
235 nfc->timing.twb = meson_chip->twb; in meson_nfc_select_chip()
236 nfc->timing.tadl = meson_chip->tadl; in meson_nfc_select_chip()
237 nfc->timing.tbers_max = meson_chip->tbers_max; in meson_nfc_select_chip()
239 if (nfc->clk_rate != meson_chip->clk_rate) { in meson_nfc_select_chip()
240 ret = clk_set_rate(nfc->device_clk, meson_chip->clk_rate); in meson_nfc_select_chip()
242 dev_err(nfc->dev, "failed to set clock rate\n"); in meson_nfc_select_chip()
245 nfc->clk_rate = meson_chip->clk_rate; in meson_nfc_select_chip()
[all …]
Darasan-nand-controller.c205 static int anfc_wait_for_event(struct arasan_nfc *nfc, unsigned int event) in anfc_wait_for_event() argument
210 ret = readl_relaxed_poll_timeout(nfc->base + INTR_STS_REG, val, in anfc_wait_for_event()
214 dev_err(nfc->dev, "Timeout waiting for event 0x%x\n", event); in anfc_wait_for_event()
218 writel_relaxed(event, nfc->base + INTR_STS_REG); in anfc_wait_for_event()
223 static int anfc_wait_for_rb(struct arasan_nfc *nfc, struct nand_chip *chip, in anfc_wait_for_rb() argument
231 ret = readl_relaxed_poll_timeout(nfc->base + READY_STS_REG, val, in anfc_wait_for_rb()
235 dev_err(nfc->dev, "Timeout waiting for R/B 0x%x\n", in anfc_wait_for_rb()
236 readl_relaxed(nfc->base + READY_STS_REG)); in anfc_wait_for_rb()
243 static void anfc_trigger_op(struct arasan_nfc *nfc, struct anfc_op *nfc_op) in anfc_trigger_op() argument
245 writel_relaxed(nfc_op->pkt_reg, nfc->base + PKT_REG); in anfc_trigger_op()
[all …]
Dmarvell_nand.c508 static void marvell_nfc_disable_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_disable_int() argument
513 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_disable_int()
514 writel_relaxed(reg | int_mask, nfc->regs + NDCR); in marvell_nfc_disable_int()
517 static void marvell_nfc_enable_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_enable_int() argument
522 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_enable_int()
523 writel_relaxed(reg & ~int_mask, nfc->regs + NDCR); in marvell_nfc_enable_int()
526 static u32 marvell_nfc_clear_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_clear_int() argument
530 reg = readl_relaxed(nfc->regs + NDSR); in marvell_nfc_clear_int()
531 writel_relaxed(int_mask, nfc->regs + NDSR); in marvell_nfc_clear_int()
539 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_force_byte_access() local
[all …]
Dsunxi_nand.c259 struct sunxi_nfc *nfc = dev_id; in sunxi_nfc_interrupt() local
260 u32 st = readl(nfc->regs + NFC_REG_ST); in sunxi_nfc_interrupt()
261 u32 ien = readl(nfc->regs + NFC_REG_INT); in sunxi_nfc_interrupt()
267 complete(&nfc->complete); in sunxi_nfc_interrupt()
269 writel(st & NFC_INT_MASK, nfc->regs + NFC_REG_ST); in sunxi_nfc_interrupt()
270 writel(~st & ien & NFC_INT_MASK, nfc->regs + NFC_REG_INT); in sunxi_nfc_interrupt()
275 static int sunxi_nfc_wait_events(struct sunxi_nfc *nfc, u32 events, in sunxi_nfc_wait_events() argument
287 init_completion(&nfc->complete); in sunxi_nfc_wait_events()
289 writel(events, nfc->regs + NFC_REG_INT); in sunxi_nfc_wait_events()
291 ret = wait_for_completion_timeout(&nfc->complete, in sunxi_nfc_wait_events()
[all …]
Dtango_nand.c118 struct tango_nfc *nfc = to_tango_nfc(chip->controller); in tango_select_target() local
121 writel_relaxed(tchip->timing1, nfc->reg_base + NFC_TIMING1); in tango_select_target()
122 writel_relaxed(tchip->timing2, nfc->reg_base + NFC_TIMING2); in tango_select_target()
123 writel_relaxed(tchip->xfer_cfg, nfc->reg_base + NFC_XFER_CFG); in tango_select_target()
124 writel_relaxed(tchip->pkt_0_cfg, nfc->reg_base + NFC_PKT_0_CFG); in tango_select_target()
125 writel_relaxed(tchip->pkt_n_cfg, nfc->reg_base + NFC_PKT_N_CFG); in tango_select_target()
126 writel_relaxed(tchip->bb_cfg, nfc->reg_base + NFC_BB_CFG); in tango_select_target()
131 struct tango_nfc *nfc = to_tango_nfc(chip->controller); in tango_waitrdy() local
134 return readl_relaxed_poll_timeout(nfc->pbus_base + PBUS_CS_CTRL, in tango_waitrdy()
227 struct tango_nfc *nfc = to_tango_nfc(chip->controller); in decode_error_report() local
[all …]
/drivers/mtd/nand/raw/ingenic/
Dingenic_nand_drv.c152 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller); in ingenic_nand_ecc_calculate() local
166 return ingenic_ecc_calculate(nfc->ecc, &params, dat, ecc_code); in ingenic_nand_ecc_calculate()
173 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller); in ingenic_nand_ecc_correct() local
180 return ingenic_ecc_correct(nfc->ecc, &params, dat, read_ecc); in ingenic_nand_ecc_correct()
186 struct ingenic_nfc *nfc = to_ingenic_nfc(chip->controller); in ingenic_nand_attach_chip() local
199 if (!nfc->ecc) { in ingenic_nand_attach_chip()
200 dev_err(nfc->dev, "HW ECC selected, but ECC controller not found\n"); in ingenic_nand_attach_chip()
209 dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n", in ingenic_nand_attach_chip()
210 (nfc->ecc) ? "hardware ECC" : "software ECC", in ingenic_nand_attach_chip()
214 dev_info(nfc->dev, "not using ECC\n"); in ingenic_nand_attach_chip()
[all …]
/drivers/nfc/
DKconfig25 This adds support to use an mei bus nfc device. Select this if you
52 source "drivers/nfc/fdp/Kconfig"
53 source "drivers/nfc/pn544/Kconfig"
54 source "drivers/nfc/pn533/Kconfig"
55 source "drivers/nfc/microread/Kconfig"
56 source "drivers/nfc/nfcmrvl/Kconfig"
57 source "drivers/nfc/st21nfca/Kconfig"
58 source "drivers/nfc/st-nci/Kconfig"
59 source "drivers/nfc/nxp-nci/Kconfig"
60 source "drivers/nfc/s3fwrn5/Kconfig"
[all …]
/drivers/net/ethernet/marvell/octeontx2/nic/
Dotx2_ethtool.c424 struct ethtool_rxnfc *nfc) in otx2_get_rss_hash_opts() argument
433 nfc->data = RXH_IP_SRC | RXH_IP_DST; in otx2_get_rss_hash_opts()
435 nfc->data |= RXH_VLAN; in otx2_get_rss_hash_opts()
437 switch (nfc->flow_type) { in otx2_get_rss_hash_opts()
441 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; in otx2_get_rss_hash_opts()
446 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; in otx2_get_rss_hash_opts()
451 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; in otx2_get_rss_hash_opts()
469 struct ethtool_rxnfc *nfc) in otx2_set_rss_hash_opts() argument
482 if (!(nfc->data & RXH_IP_SRC) || !(nfc->data & RXH_IP_DST)) in otx2_set_rss_hash_opts()
485 if (nfc->data & RXH_VLAN) in otx2_set_rss_hash_opts()
[all …]
/drivers/net/dsa/
Dbcm_sf2_cfp.c1069 struct ethtool_rxnfc *nfc) in bcm_sf2_cfp_rule_get() argument
1073 rule = bcm_sf2_cfp_rule_find(priv, port, nfc->fs.location); in bcm_sf2_cfp_rule_get()
1077 memcpy(&nfc->fs, &rule->fs, sizeof(rule->fs)); in bcm_sf2_cfp_rule_get()
1079 bcm_sf2_invert_masks(&nfc->fs); in bcm_sf2_cfp_rule_get()
1082 nfc->data = bcm_sf2_cfp_rule_size(priv); in bcm_sf2_cfp_rule_get()
1089 int port, struct ethtool_rxnfc *nfc, in bcm_sf2_cfp_rule_get_all() argument
1100 nfc->data = bcm_sf2_cfp_rule_size(priv); in bcm_sf2_cfp_rule_get_all()
1101 nfc->rule_cnt = rules_cnt; in bcm_sf2_cfp_rule_get_all()
1107 struct ethtool_rxnfc *nfc, u32 *rule_locs) in bcm_sf2_get_rxnfc() argument
1115 switch (nfc->cmd) { in bcm_sf2_get_rxnfc()
[all …]
Dbcm_sf2.h213 struct ethtool_rxnfc *nfc, u32 *rule_locs);
215 struct ethtool_rxnfc *nfc);
/drivers/net/ethernet/mellanox/mlx5/core/
Den_fs_ethtool.c817 struct ethtool_rxnfc *nfc) in mlx5e_set_rss_hash_opt() argument
824 tt = flow_type_to_traffic_type(nfc->flow_type); in mlx5e_set_rss_hash_opt()
832 if (nfc->flow_type != TCP_V4_FLOW && in mlx5e_set_rss_hash_opt()
833 nfc->flow_type != TCP_V6_FLOW && in mlx5e_set_rss_hash_opt()
834 nfc->flow_type != UDP_V4_FLOW && in mlx5e_set_rss_hash_opt()
835 nfc->flow_type != UDP_V6_FLOW) in mlx5e_set_rss_hash_opt()
838 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | in mlx5e_set_rss_hash_opt()
842 if (nfc->data & RXH_IP_SRC) in mlx5e_set_rss_hash_opt()
844 if (nfc->data & RXH_IP_DST) in mlx5e_set_rss_hash_opt()
846 if (nfc->data & RXH_L4_B_0_1) in mlx5e_set_rss_hash_opt()
[all …]
/drivers/net/vmxnet3/
Dvmxnet3_ethtool.c819 struct ethtool_rxnfc *nfc) in vmxnet3_set_rss_hash_opt() argument
826 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | in vmxnet3_set_rss_hash_opt()
830 switch (nfc->flow_type) { in vmxnet3_set_rss_hash_opt()
833 if (!(nfc->data & RXH_IP_SRC) || in vmxnet3_set_rss_hash_opt()
834 !(nfc->data & RXH_IP_DST) || in vmxnet3_set_rss_hash_opt()
835 !(nfc->data & RXH_L4_B_0_1) || in vmxnet3_set_rss_hash_opt()
836 !(nfc->data & RXH_L4_B_2_3)) in vmxnet3_set_rss_hash_opt()
840 if (!(nfc->data & RXH_IP_SRC) || in vmxnet3_set_rss_hash_opt()
841 !(nfc->data & RXH_IP_DST)) in vmxnet3_set_rss_hash_opt()
843 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { in vmxnet3_set_rss_hash_opt()
[all …]
/drivers/net/ethernet/intel/fm10k/
Dfm10k_ethtool.c748 struct ethtool_rxnfc *nfc) in fm10k_set_rss_hash_opt() argument
758 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | in fm10k_set_rss_hash_opt()
762 switch (nfc->flow_type) { in fm10k_set_rss_hash_opt()
765 if (!(nfc->data & RXH_IP_SRC) || in fm10k_set_rss_hash_opt()
766 !(nfc->data & RXH_IP_DST) || in fm10k_set_rss_hash_opt()
767 !(nfc->data & RXH_L4_B_0_1) || in fm10k_set_rss_hash_opt()
768 !(nfc->data & RXH_L4_B_2_3)) in fm10k_set_rss_hash_opt()
772 if (!(nfc->data & RXH_IP_SRC) || in fm10k_set_rss_hash_opt()
773 !(nfc->data & RXH_IP_DST)) in fm10k_set_rss_hash_opt()
775 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { in fm10k_set_rss_hash_opt()
[all …]
/drivers/net/ethernet/intel/ice/
Dice_ethtool.c2430 static u32 ice_parse_hdrs(struct ethtool_rxnfc *nfc) in ice_parse_hdrs() argument
2434 switch (nfc->flow_type) { in ice_parse_hdrs()
2479 static u64 ice_parse_hash_flds(struct ethtool_rxnfc *nfc) in ice_parse_hash_flds() argument
2483 if (nfc->data & RXH_IP_SRC || nfc->data & RXH_IP_DST) { in ice_parse_hash_flds()
2484 switch (nfc->flow_type) { in ice_parse_hash_flds()
2488 if (nfc->data & RXH_IP_SRC) in ice_parse_hash_flds()
2490 if (nfc->data & RXH_IP_DST) in ice_parse_hash_flds()
2496 if (nfc->data & RXH_IP_SRC) in ice_parse_hash_flds()
2498 if (nfc->data & RXH_IP_DST) in ice_parse_hash_flds()
2506 if (nfc->data & RXH_L4_B_0_1 || nfc->data & RXH_L4_B_2_3) { in ice_parse_hash_flds()
[all …]
/drivers/net/ethernet/intel/igc/
Digc_ethtool.c1080 struct ethtool_rxnfc *nfc) in igc_ethtool_set_rss_hash_opt() argument
1087 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | in igc_ethtool_set_rss_hash_opt()
1091 switch (nfc->flow_type) { in igc_ethtool_set_rss_hash_opt()
1094 if (!(nfc->data & RXH_IP_SRC) || in igc_ethtool_set_rss_hash_opt()
1095 !(nfc->data & RXH_IP_DST) || in igc_ethtool_set_rss_hash_opt()
1096 !(nfc->data & RXH_L4_B_0_1) || in igc_ethtool_set_rss_hash_opt()
1097 !(nfc->data & RXH_L4_B_2_3)) in igc_ethtool_set_rss_hash_opt()
1101 if (!(nfc->data & RXH_IP_SRC) || in igc_ethtool_set_rss_hash_opt()
1102 !(nfc->data & RXH_IP_DST)) in igc_ethtool_set_rss_hash_opt()
1104 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { in igc_ethtool_set_rss_hash_opt()
[all …]
/drivers/net/ethernet/freescale/dpaa/
Ddpaa_ethtool.c431 struct ethtool_rxnfc *nfc) in dpaa_set_hash_opts() argument
436 if (nfc->data & in dpaa_set_hash_opts()
440 switch (nfc->flow_type) { in dpaa_set_hash_opts()
455 dpaa_set_hash(dev, !!nfc->data); in dpaa_set_hash_opts()
/drivers/net/ethernet/broadcom/
Dbcmsysport.c2148 struct ethtool_rxnfc *nfc) in bcm_sysport_rule_get() argument
2153 index = bcm_sysport_rule_find(priv, nfc->fs.location); in bcm_sysport_rule_get()
2157 nfc->fs.ring_cookie = RX_CLS_FLOW_WAKE; in bcm_sysport_rule_get()
2163 struct ethtool_rxnfc *nfc) in bcm_sysport_rule_set() argument
2171 if (nfc->fs.location > RXCHK_BRCM_TAG_CID_MASK) in bcm_sysport_rule_set()
2175 if (nfc->fs.ring_cookie != RX_CLS_FLOW_WAKE) in bcm_sysport_rule_set()
2192 reg |= nfc->fs.location << RXCHK_BRCM_TAG_CID_SHIFT; in bcm_sysport_rule_set()
2196 priv->filters_loc[index] = nfc->fs.location; in bcm_sysport_rule_set()
2222 struct ethtool_rxnfc *nfc, u32 *rule_locs) in bcm_sysport_get_rxnfc() argument
2227 switch (nfc->cmd) { in bcm_sysport_get_rxnfc()
[all …]
/drivers/net/ethernet/hisilicon/hns3/hns3vf/
Dhclgevf_main.c848 static u8 hclgevf_get_rss_hash_bits(struct ethtool_rxnfc *nfc) in hclgevf_get_rss_hash_bits() argument
850 u8 hash_sets = nfc->data & RXH_L4_B_0_1 ? HCLGEVF_S_PORT_BIT : 0; in hclgevf_get_rss_hash_bits()
852 if (nfc->data & RXH_L4_B_2_3) in hclgevf_get_rss_hash_bits()
857 if (nfc->data & RXH_IP_SRC) in hclgevf_get_rss_hash_bits()
862 if (nfc->data & RXH_IP_DST) in hclgevf_get_rss_hash_bits()
867 if (nfc->flow_type == SCTP_V4_FLOW || nfc->flow_type == SCTP_V6_FLOW) in hclgevf_get_rss_hash_bits()
874 struct ethtool_rxnfc *nfc) in hclgevf_set_rss_tuple() argument
886 if (nfc->data & in hclgevf_set_rss_tuple()
902 tuple_sets = hclgevf_get_rss_hash_bits(nfc); in hclgevf_set_rss_tuple()
903 switch (nfc->flow_type) { in hclgevf_set_rss_tuple()
[all …]
/drivers/net/ethernet/intel/igb/
Digb_ethtool.c2596 struct ethtool_rxnfc *nfc) in igb_set_rss_hash_opt() argument
2603 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | in igb_set_rss_hash_opt()
2607 switch (nfc->flow_type) { in igb_set_rss_hash_opt()
2610 if (!(nfc->data & RXH_IP_SRC) || in igb_set_rss_hash_opt()
2611 !(nfc->data & RXH_IP_DST) || in igb_set_rss_hash_opt()
2612 !(nfc->data & RXH_L4_B_0_1) || in igb_set_rss_hash_opt()
2613 !(nfc->data & RXH_L4_B_2_3)) in igb_set_rss_hash_opt()
2617 if (!(nfc->data & RXH_IP_SRC) || in igb_set_rss_hash_opt()
2618 !(nfc->data & RXH_IP_DST)) in igb_set_rss_hash_opt()
2620 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { in igb_set_rss_hash_opt()
[all …]
/drivers/net/ethernet/intel/ixgbe/
Dixgbe_ethtool.c2929 struct ethtool_rxnfc *nfc) in ixgbe_set_rss_hash_opt() argument
2937 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | in ixgbe_set_rss_hash_opt()
2941 switch (nfc->flow_type) { in ixgbe_set_rss_hash_opt()
2944 if (!(nfc->data & RXH_IP_SRC) || in ixgbe_set_rss_hash_opt()
2945 !(nfc->data & RXH_IP_DST) || in ixgbe_set_rss_hash_opt()
2946 !(nfc->data & RXH_L4_B_0_1) || in ixgbe_set_rss_hash_opt()
2947 !(nfc->data & RXH_L4_B_2_3)) in ixgbe_set_rss_hash_opt()
2951 if (!(nfc->data & RXH_IP_SRC) || in ixgbe_set_rss_hash_opt()
2952 !(nfc->data & RXH_IP_DST)) in ixgbe_set_rss_hash_opt()
2954 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { in ixgbe_set_rss_hash_opt()
[all …]
/drivers/clk/imx/
Dclk-imx31.c40 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
75 clk[nfc] = imx_clk_divider("nfc", "ahb", base + MXC_CCM_PDR0, 8, 3); in _mx31_clocks_init()

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